Message ID | 20190705095800.43534-1-mika.westerberg@linux.intel.com (mailing list archive) |
---|---|
Headers | show |
Series | thunderbolt: Intel Ice Lake support | expand |
On Fri, Jul 05, 2019 at 12:57:52PM +0300, Mika Westerberg wrote: > Hi all, > > With the exception of the first patch which is fix, this series enables > Thunderbolt on Intel Ice Lake. Biggest difference from the previous > controllers is that the Thunderbolt controller is now integrated as part of > the SoC. The firmware messages pretty much follow Titan Ridge but there are > some differences as well (such as the new RTD3 veto notification). Also Ice > Lake does not implement security levels so DMA protection is handled by IOMMU. > > This is v5.4 material but I'm sending it out now because I will be on > vacation next 4 weeks mostly without internet access. When I get back I'll > gather all the comments and update the series accordingly. > > Thanks! > > Mika Westerberg (8): > thunderbolt: Correct path indices for PCIe tunnel > thunderbolt: Move NVM upgrade support flag to struct icm > thunderbolt: Use 32-bit writes when writing ring producer/consumer > thunderbolt: Do not fail adding switch if some port is not implemented > thunderbolt: Hide switch attributes that are not set > thunderbolt: Expose active parts of NVM even if upgrade is not supported > thunderbolt: Add support for Intel Ice Lake > ACPI / property: Add two new Thunderbolt property GUIDs to the list Forgot to Cc Raanan and Raj, now added. Sorry about that. The patch series can also be viewed here: https://lore.kernel.org/lkml/20190705095800.43534-1-mika.westerberg@linux.intel.com/T/#m9cb5a393dfc79f1c2212d0787b6bad5b689db6bd
On Fri, Jul 5, 2019 at 1:33 PM Mika Westerberg <mika.westerberg@linux.intel.com> wrote: > > On Fri, Jul 05, 2019 at 12:57:52PM +0300, Mika Westerberg wrote: > > Hi all, > > > > With the exception of the first patch which is fix, this series enables > > Thunderbolt on Intel Ice Lake. Biggest difference from the previous > > controllers is that the Thunderbolt controller is now integrated as part of > > the SoC. The firmware messages pretty much follow Titan Ridge but there are > > some differences as well (such as the new RTD3 veto notification). Also Ice > > Lake does not implement security levels so DMA protection is handled by IOMMU. > > > > This is v5.4 material but I'm sending it out now because I will be on > > vacation next 4 weeks mostly without internet access. When I get back I'll > > gather all the comments and update the series accordingly. > > > > Thanks! > > > > Mika Westerberg (8): > > thunderbolt: Correct path indices for PCIe tunnel > > thunderbolt: Move NVM upgrade support flag to struct icm > > thunderbolt: Use 32-bit writes when writing ring producer/consumer > > thunderbolt: Do not fail adding switch if some port is not implemented > > thunderbolt: Hide switch attributes that are not set > > thunderbolt: Expose active parts of NVM even if upgrade is not supported > > thunderbolt: Add support for Intel Ice Lake > > ACPI / property: Add two new Thunderbolt property GUIDs to the list > > Forgot to Cc Raanan and Raj, now added. Sorry about that. The patch > series can also be viewed here: > > https://lore.kernel.org/lkml/20190705095800.43534-1-mika.westerberg@linux.intel.com/T/#m9cb5a393dfc79f1c2212d0787b6bad5b689db6bd Besides a few comments, LGTM. For Thunderbolt patches, Reviewed-by: Yehezkel Bernat <YehezkelShB@gmail.com>