From patchwork Thu Mar 7 08:47:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Xu, Haibo1" X-Patchwork-Id: 13585173 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 71BAC823C4; Thu, 7 Mar 2024 08:34:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709800490; cv=none; b=aiFhACyV8BbIoGOCGwfjDBz8dLItyjQ+msqZ1sPeG5CbG7CrkY9EPRGk59/GzmrCVgP0+FhiYAjD6TPON8x5SkwJdKsEf7d6+3/rvYJWVn8qfGeT/J/FPMYIOKamXxIMTdWu137sgnHY/BirzHqhKRZvMTRLshkJl/hP4wpvKXg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709800490; c=relaxed/simple; bh=vVb6RIIvOt4enB6/MzuWcA6dkAPHXShQ2Vxb7to1nk8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=m+E2AMqhKgog6g+xQaO/TpUfmBYMUrzhRcBUDB/6hTd681J7Q8RnSKaxz07vuczIQhc9t28l55SXI4oQ4+EFcFHxrgP4AQcB7luTdNiabhM6ie52K57I0GI8N2sKN8ZoLFZ4D2hB+C6bqRfxgIEa8s16G7wtgj7EVCBf5gQNG6o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=gmMy1doe; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="gmMy1doe" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1709800486; x=1741336486; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vVb6RIIvOt4enB6/MzuWcA6dkAPHXShQ2Vxb7to1nk8=; b=gmMy1doeiLf/bohCn0JmPik8+HxLrqPIr48cMTerjyxxV/LzyO65Q3+v CVMUqxijcJypm4/DCpuiK9lXQ70pOhuJ9h50PkstneoZ9oYKtfz3AYOH5 tYbyomj5Zw4mzCroEh7M5kwmUN+zkqHQIIajduc5x3LcPLi1PWPpuQpr1 7lL16gFthcCFziyCIkQI9iBT8Mw+vQwkJ4Y2GzHHl96hS22EeE3XpcjAB 6y1o7CNJYYzaMW8M3hkkj3rax5+3i+gvXe2LMz3yt2jbNZGFC9BrjAazu 05R8dZvQ2cJudKDa2PN/NCych81ZNAYMcUPJz4QvzpbflV1qnqdjFZy1G Q==; X-IronPort-AV: E=McAfee;i="6600,9927,11005"; a="4600300" X-IronPort-AV: E=Sophos;i="6.06,210,1705392000"; d="scan'208";a="4600300" Received: from orviesa004.jf.intel.com ([10.64.159.144]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Mar 2024 00:34:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.06,210,1705392000"; d="scan'208";a="14699587" Received: from haibo-optiplex-7090.sh.intel.com ([10.239.159.132]) by orviesa004.jf.intel.com with ESMTP; 07 Mar 2024 00:34:35 -0800 From: Haibo Xu To: Cc: xiaobo55x@gmail.com, ajones@ventanamicro.com, sunilvl@ventanamicro.com, Haibo Xu , Paul Walmsley , Palmer Dabbelt , Albert Ou , "Rafael J. Wysocki" , Len Brown , Robert Moore , Conor Dooley , Guo Ren , Anup Patel , Greentime Hu , Alexandre Ghiti , Sami Tolvanen , Zong Li , Jisheng Zhang , Baoquan He , =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= , Greg Kroah-Hartman , Chen Jiahao , Arnd Bergmann , James Morse , Evan Green , Samuel Holland , Marc Zyngier , Ard Biesheuvel , Tony Luck , Yuntao Wang , Dan Williams , Alison Schofield , Dave Hansen , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v2 1/6] ACPICA: SRAT: Add RISC-V RINTC affinity structure Date: Thu, 7 Mar 2024 16:47:53 +0800 Message-Id: <01b9c8a6d029b178f819616912a0ff8928b534a8.1709780590.git.haibo1.xu@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-acpi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ACPICA commit 93caddbf2f620769052c59ec471f018281dc3a24 Add definition of RISC-V Interrupt Controller(RINTC) affinity structure which was approved by UEFI forum and will be part of next ACPI spec version(6.6). Link: https://github.com/acpica/acpica/commit/93caddbf Signed-off-by: Haibo Xu --- include/acpi/actbl3.h | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/include/acpi/actbl3.h b/include/acpi/actbl3.h index c080d579a546..5202e3fc9b41 100644 --- a/include/acpi/actbl3.h +++ b/include/acpi/actbl3.h @@ -192,7 +192,8 @@ enum acpi_srat_type { ACPI_SRAT_TYPE_GIC_ITS_AFFINITY = 4, /* ACPI 6.2 */ ACPI_SRAT_TYPE_GENERIC_AFFINITY = 5, /* ACPI 6.3 */ ACPI_SRAT_TYPE_GENERIC_PORT_AFFINITY = 6, /* ACPI 6.4 */ - ACPI_SRAT_TYPE_RESERVED = 7 /* 7 and greater are reserved */ + ACPI_SRAT_TYPE_RINTC_AFFINITY = 7, /* ACPI 6.6 */ + ACPI_SRAT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ }; /* @@ -296,6 +297,21 @@ struct acpi_srat_generic_affinity { #define ACPI_SRAT_GENERIC_AFFINITY_ENABLED (1) /* 00: Use affinity structure */ #define ACPI_SRAT_ARCHITECTURAL_TRANSACTIONS (1<<1) /* ACPI 6.4 */ +/* 7: RINTC Affinity (ACPI 6.6) */ + +struct acpi_srat_rintc_affinity { + struct acpi_subtable_header header; + u16 reserved; /* Reserved, must be zero */ + u32 proximity_domain; + u32 acpi_processor_uid; + u32 flags; + u32 clock_domain; +}; + +/* Flags for struct acpi_srat_rintc_affinity */ + +#define ACPI_SRAT_RINTC_ENABLED (1) /* 00: Use affinity structure */ + /******************************************************************************* * * STAO - Status Override Table (_STA override) - ACPI 6.0