diff mbox

intel-pstate: Use #defines instead of hard-coded values.

Message ID 1363789270-29579-1-git-send-email-konrad.wilk@oracle.com (mailing list archive)
State Accepted, archived
Headers show

Commit Message

Konrad Rzeszutek Wilk March 20, 2013, 2:21 p.m. UTC
They are defined in coreboot (MSR_PLATFORM) and the other
one is already defined in msr-index.h.

Lets use those.

CC: rafael.j.wysocki@intel.com
CC: dirk.j.brandewie@intel.com
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
 arch/x86/include/uapi/asm/msr-index.h | 1 +
 drivers/cpufreq/intel_pstate.c        | 6 +++---
 2 files changed, 4 insertions(+), 3 deletions(-)

Comments

Viresh Kumar March 20, 2013, 2:38 p.m. UTC | #1
On Wed, Mar 20, 2013 at 7:51 PM, Konrad Rzeszutek Wilk
<konrad.wilk@oracle.com> wrote:
> They are defined in coreboot (MSR_PLATFORM) and the other
> one is already defined in msr-index.h.
>
> Lets use those.
>
> CC: rafael.j.wysocki@intel.com
> CC: dirk.j.brandewie@intel.com
> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
> ---
>  arch/x86/include/uapi/asm/msr-index.h | 1 +
>  drivers/cpufreq/intel_pstate.c        | 6 +++---
>  2 files changed, 4 insertions(+), 3 deletions(-)

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
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dirk.brandewie@gmail.com March 20, 2013, 4:11 p.m. UTC | #2
On 03/20/2013 07:21 AM, Konrad Rzeszutek Wilk wrote:
> They are defined in coreboot (MSR_PLATFORM) and the other
> one is already defined in msr-index.h.
>
> Lets use those.
>
> CC: rafael.j.wysocki@intel.com
> CC: dirk.j.brandewie@intel.com
> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

Acked-by: Dirk Brandewie <dirk.j.brandewie@intel.com>

> ---
>   arch/x86/include/uapi/asm/msr-index.h | 1 +
>   drivers/cpufreq/intel_pstate.c        | 6 +++---
>   2 files changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
> index 892ce40..7a060f4 100644
> --- a/arch/x86/include/uapi/asm/msr-index.h
> +++ b/arch/x86/include/uapi/asm/msr-index.h
> @@ -44,6 +44,7 @@
>   #define SNB_C1_AUTO_UNDEMOTE		(1UL << 27)
>   #define SNB_C3_AUTO_UNDEMOTE		(1UL << 28)
>
> +#define MSR_PLATFORM_INFO		0x000000ce
>   #define MSR_MTRRcap			0x000000fe
>   #define MSR_IA32_BBL_CR_CTL		0x00000119
>   #define MSR_IA32_BBL_CR_CTL3		0x0000011e
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index f6dd1e7..dadc27d 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -358,14 +358,14 @@ static void intel_pstate_sysfs_expose_params(void)
>   static int intel_pstate_min_pstate(void)
>   {
>   	u64 value;
> -	rdmsrl(0xCE, value);
> +	rdmsrl(MSR_PLATFORM_INFO, value);
>   	return (value >> 40) & 0xFF;
>   }
>
>   static int intel_pstate_max_pstate(void)
>   {
>   	u64 value;
> -	rdmsrl(0xCE, value);
> +	rdmsrl(MSR_PLATFORM_INFO, value);
>   	return (value >> 8) & 0xFF;
>   }
>
> @@ -373,7 +373,7 @@ static int intel_pstate_turbo_pstate(void)
>   {
>   	u64 value;
>   	int nont, ret;
> -	rdmsrl(0x1AD, value);
> +	rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
>   	nont = intel_pstate_max_pstate();
>   	ret = ((value) & 255);
>   	if (ret <= nont)
>

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Rafael Wysocki March 26, 2013, 1:37 p.m. UTC | #3
On Wednesday, March 20, 2013 10:21:10 AM Konrad Rzeszutek Wilk wrote:
> They are defined in coreboot (MSR_PLATFORM) and the other
> one is already defined in msr-index.h.
> 
> Lets use those.
> 
> CC: rafael.j.wysocki@intel.com
> CC: dirk.j.brandewie@intel.com
> Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

Applied.

Thanks,
Rafael


> ---
>  arch/x86/include/uapi/asm/msr-index.h | 1 +
>  drivers/cpufreq/intel_pstate.c        | 6 +++---
>  2 files changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
> index 892ce40..7a060f4 100644
> --- a/arch/x86/include/uapi/asm/msr-index.h
> +++ b/arch/x86/include/uapi/asm/msr-index.h
> @@ -44,6 +44,7 @@
>  #define SNB_C1_AUTO_UNDEMOTE		(1UL << 27)
>  #define SNB_C3_AUTO_UNDEMOTE		(1UL << 28)
>  
> +#define MSR_PLATFORM_INFO		0x000000ce
>  #define MSR_MTRRcap			0x000000fe
>  #define MSR_IA32_BBL_CR_CTL		0x00000119
>  #define MSR_IA32_BBL_CR_CTL3		0x0000011e
> diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
> index f6dd1e7..dadc27d 100644
> --- a/drivers/cpufreq/intel_pstate.c
> +++ b/drivers/cpufreq/intel_pstate.c
> @@ -358,14 +358,14 @@ static void intel_pstate_sysfs_expose_params(void)
>  static int intel_pstate_min_pstate(void)
>  {
>  	u64 value;
> -	rdmsrl(0xCE, value);
> +	rdmsrl(MSR_PLATFORM_INFO, value);
>  	return (value >> 40) & 0xFF;
>  }
>  
>  static int intel_pstate_max_pstate(void)
>  {
>  	u64 value;
> -	rdmsrl(0xCE, value);
> +	rdmsrl(MSR_PLATFORM_INFO, value);
>  	return (value >> 8) & 0xFF;
>  }
>  
> @@ -373,7 +373,7 @@ static int intel_pstate_turbo_pstate(void)
>  {
>  	u64 value;
>  	int nont, ret;
> -	rdmsrl(0x1AD, value);
> +	rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
>  	nont = intel_pstate_max_pstate();
>  	ret = ((value) & 255);
>  	if (ret <= nont)
>
diff mbox

Patch

diff --git a/arch/x86/include/uapi/asm/msr-index.h b/arch/x86/include/uapi/asm/msr-index.h
index 892ce40..7a060f4 100644
--- a/arch/x86/include/uapi/asm/msr-index.h
+++ b/arch/x86/include/uapi/asm/msr-index.h
@@ -44,6 +44,7 @@ 
 #define SNB_C1_AUTO_UNDEMOTE		(1UL << 27)
 #define SNB_C3_AUTO_UNDEMOTE		(1UL << 28)
 
+#define MSR_PLATFORM_INFO		0x000000ce
 #define MSR_MTRRcap			0x000000fe
 #define MSR_IA32_BBL_CR_CTL		0x00000119
 #define MSR_IA32_BBL_CR_CTL3		0x0000011e
diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index f6dd1e7..dadc27d 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -358,14 +358,14 @@  static void intel_pstate_sysfs_expose_params(void)
 static int intel_pstate_min_pstate(void)
 {
 	u64 value;
-	rdmsrl(0xCE, value);
+	rdmsrl(MSR_PLATFORM_INFO, value);
 	return (value >> 40) & 0xFF;
 }
 
 static int intel_pstate_max_pstate(void)
 {
 	u64 value;
-	rdmsrl(0xCE, value);
+	rdmsrl(MSR_PLATFORM_INFO, value);
 	return (value >> 8) & 0xFF;
 }
 
@@ -373,7 +373,7 @@  static int intel_pstate_turbo_pstate(void)
 {
 	u64 value;
 	int nont, ret;
-	rdmsrl(0x1AD, value);
+	rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
 	nont = intel_pstate_max_pstate();
 	ret = ((value) & 255);
 	if (ret <= nont)