From patchwork Fri Feb 17 08:27:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen Yu X-Patchwork-Id: 9579127 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3F9EE6042F for ; Fri, 17 Feb 2017 08:28:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 317C82868A for ; Fri, 17 Feb 2017 08:28:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 24989286B1; Fri, 17 Feb 2017 08:28:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 89D0F2868A for ; Fri, 17 Feb 2017 08:28:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932316AbdBQI2S (ORCPT ); Fri, 17 Feb 2017 03:28:18 -0500 Received: from mga04.intel.com ([192.55.52.120]:30774 "EHLO mga04.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755306AbdBQI2R (ORCPT ); Fri, 17 Feb 2017 03:28:17 -0500 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 Feb 2017 00:28:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,171,1484035200"; d="scan'208";a="47571200" Received: from yu-desktop-1.sh.intel.com ([10.239.160.134]) by orsmga002.jf.intel.com with ESMTP; 17 Feb 2017 00:28:13 -0800 From: Chen Yu To: linux-acpi@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Chen Yu , Len Brown , "Rafael J. Wysocki" , Pavel Machek , Zhang Rui , Ingo Molnar , linux-pm@vger.kernel.org Subject: [PATCH][RFC v4] ACPI throttling: Disable the MSR T-state if enabled after resumed Date: Fri, 17 Feb 2017 16:27:30 +0800 Message-Id: <1487320050-22894-1-git-send-email-yu.c.chen@intel.com> X-Mailer: git-send-email 2.7.4 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Previously a bug was reported that on certain Broadwell platform, after resumed from S3, the CPU is running at an anomalously low speed, due to the BIOS has enabled the MSR throttling across S3. The solution to this was to introduce a quirk framework to save/restore tstate MSR register around suspend/resume, in Commit 7a9c2dd08ead ("x86/pm: Introduce quirk framework to save/restore extra MSR registers around suspend/resume"). However there are still three problems left: 1. More and more reports show that other platforms also encountered the same issue, so the quirk list might be endless. 2. Each CPUs should take the save/restore operation into consideration, rather than the boot CPU alone. 3. Normally ACPI T-state re-evaluation is done on resume, however there is no _TSS on the bogus platform, thus above re-evaluation code does not run on that machine. Solution: This patch is based on the fact that, we generally should not expect the system to come back from resume with throttling enabled, but leverage the OS components to deal with it, such as thermal event. So we simply clear the MSR T-state and print the warning if it is found to be enabled after resumed back. Besides, we can remove the quirk in previous patch later. Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=90041 Reported-and-tested-by: Kadir Suggested-by: Len Brown Cc: Len Brown Cc: "Rafael J. Wysocki" Cc: Pavel Machek Cc: Zhang Rui Cc: Ingo Molnar Cc: linux-pm@vger.kernel.org Signed-off-by: Chen Yu --- drivers/acpi/processor_throttling.c | 58 +++++++++++++++++++++++++++++++++++++ 1 file changed, 58 insertions(+) diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c index a12f96c..e121449 100644 --- a/drivers/acpi/processor_throttling.c +++ b/drivers/acpi/processor_throttling.c @@ -29,6 +29,7 @@ #include #include #include +#include #include #include #include @@ -64,6 +65,7 @@ struct acpi_processor_throttling_arg { static int acpi_processor_get_throttling(struct acpi_processor *pr); int acpi_processor_set_throttling(struct acpi_processor *pr, int state, bool force); +static void throttling_msr_reevaluate(int cpu); static int acpi_processor_update_tsd_coord(void) { @@ -386,6 +388,15 @@ void acpi_processor_reevaluate_tstate(struct acpi_processor *pr, pr->flags.throttling = 0; return; } + /* + * It was found after resumed from suspend to ram, some BIOSes would + * adjust the MSR tstate, however on these platforms no _PSS is provided + * thus we never have a chance to adjust the MSR T-state anymore. + * Thus force clearing it if MSR T-state is enabled, because generally + * we never expect to come back from resume with throttling enabled. + * Later let other components to adjust T-state if necessary. + */ + throttling_msr_reevaluate(pr->id); /* the following is to recheck whether the T-state is valid for * the online CPU */ @@ -758,6 +769,24 @@ static int acpi_throttling_wrmsr(u64 value) } return ret; } + +static long msr_reevaluate_fn(void *data) +{ + u64 msr = 0; + + acpi_throttling_rdmsr(&msr); + if (msr) { + printk_once(KERN_ERR "PM: The BIOS might have modified the MSR T-state, clear it for now.\n"); + acpi_throttling_wrmsr(0); + } + return 0; +} + +static void throttling_msr_reevaluate(int cpu) +{ + work_on_cpu(cpu, msr_reevaluate_fn, NULL); +} + #else static int acpi_throttling_rdmsr(u64 *value) { @@ -772,8 +801,37 @@ static int acpi_throttling_wrmsr(u64 value) "HARDWARE addr space,NOT supported yet\n"); return -1; } + +static long msr_reevaluate_fn(void *data) +{ + return 0; +} + +static void throttling_msr_reevaluate(int cpu) +{ +} #endif +void acpi_throttling_resume(void) +{ + msr_reevaluate_fn(NULL); +} + +static struct syscore_ops acpi_throttling_syscore_ops = { + .resume = acpi_throttling_resume, +}; + +static int acpi_throttling_init_ops(void) +{ + /* + * Reevaluate on boot CPU. Since it is not always CPU0, + * we can not invoke throttling_msr_reevaluate(0) directly. + */ + register_syscore_ops(&acpi_throttling_syscore_ops); + return 0; +} +device_initcall(acpi_throttling_init_ops); + static int acpi_read_throttling_status(struct acpi_processor *pr, u64 *value) {