From patchwork Fri Jul 5 09:57:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 11032301 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 91B6613A4 for ; Fri, 5 Jul 2019 09:58:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 7E47B28A22 for ; Fri, 5 Jul 2019 09:58:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 71DC528A82; Fri, 5 Jul 2019 09:58:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id EADDD28A22 for ; Fri, 5 Jul 2019 09:58:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728385AbfGEJ6F (ORCPT ); Fri, 5 Jul 2019 05:58:05 -0400 Received: from mga06.intel.com ([134.134.136.31]:42516 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728401AbfGEJ6F (ORCPT ); Fri, 5 Jul 2019 05:58:05 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jul 2019 02:58:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,454,1557212400"; d="scan'208";a="169637165" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga006.jf.intel.com with ESMTP; 05 Jul 2019 02:58:01 -0700 Received: by black.fi.intel.com (Postfix, from userid 1001) id E780A370; Fri, 5 Jul 2019 12:58:00 +0300 (EEST) From: Mika Westerberg To: linux-kernel@vger.kernel.org Cc: Andreas Noever , Michael Jamet , Yehezkel Bernat , "Rafael J . Wysocki" , Len Brown , Lukas Wunner , Mario.Limonciello@dell.com, Anthony Wong , Mika Westerberg , linux-acpi@vger.kernel.org Subject: [PATCH 3/8] thunderbolt: Use 32-bit writes when writing ring producer/consumer Date: Fri, 5 Jul 2019 12:57:55 +0300 Message-Id: <20190705095800.43534-4-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190705095800.43534-1-mika.westerberg@linux.intel.com> References: <20190705095800.43534-1-mika.westerberg@linux.intel.com> MIME-Version: 1.0 Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The register access should be using 32-bit reads/writes according to the datasheet. With the previous generation hardware 16-bit writes have been working but starting with ICL this is not the case anymore so fix producer/consumer register update to use correct width register address. Signed-off-by: Mika Westerberg --- drivers/thunderbolt/nhi.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c index 27fbe62c7ddd..09242653da67 100644 --- a/drivers/thunderbolt/nhi.c +++ b/drivers/thunderbolt/nhi.c @@ -143,9 +143,24 @@ static void __iomem *ring_options_base(struct tb_ring *ring) return io; } -static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset) +static void ring_iowrite_prod(struct tb_ring *ring, u16 prod) { - iowrite16(value, ring_desc_base(ring) + offset); + u32 val; + + val = ioread32(ring_desc_base(ring) + 8); + val &= 0x0000ffff; + val |= prod << 16; + iowrite32(val, ring_desc_base(ring) + 8); +} + +static void ring_iowrite_cons(struct tb_ring *ring, u16 cons) +{ + u32 val; + + val = ioread32(ring_desc_base(ring) + 8); + val &= 0xffff0000; + val |= cons; + iowrite32(val, ring_desc_base(ring) + 8); } static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset) @@ -197,7 +212,10 @@ static void ring_write_descriptors(struct tb_ring *ring) descriptor->sof = frame->sof; } ring->head = (ring->head + 1) % ring->size; - ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8); + if (ring->is_tx) + ring_iowrite_prod(ring, ring->head); + else + ring_iowrite_cons(ring, ring->head); } } @@ -662,7 +680,7 @@ void tb_ring_stop(struct tb_ring *ring) ring_iowrite32options(ring, 0, 0); ring_iowrite64desc(ring, 0, 0); - ring_iowrite16desc(ring, 0, ring->is_tx ? 10 : 8); + ring_iowrite32desc(ring, 0, 8); ring_iowrite32desc(ring, 0, 12); ring->head = 0; ring->tail = 0;