From patchwork Thu Apr 22 19:24:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Kuppuswamy Sathyanarayanan X-Patchwork-Id: 12219063 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EB16DC433B4 for ; Thu, 22 Apr 2021 19:24:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id B83F8613FB for ; Thu, 22 Apr 2021 19:24:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238958AbhDVTZY (ORCPT ); Thu, 22 Apr 2021 15:25:24 -0400 Received: from mga11.intel.com ([192.55.52.93]:21022 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238922AbhDVTZX (ORCPT ); Thu, 22 Apr 2021 15:25:23 -0400 IronPort-SDR: QF52nW7z1qT2+pxZP1fkksnmTw//EtmhpZ5ZsfU3fYYhePSKCutRuKIgIH+G561DFFP+4LMVMb CmT3vBFqRYdQ== X-IronPort-AV: E=McAfee;i="6200,9189,9962"; a="192770840" X-IronPort-AV: E=Sophos;i="5.82,243,1613462400"; d="scan'208";a="192770840" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2021 12:24:48 -0700 IronPort-SDR: DOjV3r9mPAPmMigIRxJirYgaubF+Z4PpEHcIugwr0W7lgblr0QjPkoLI/BOwyHZzCM78Bl5+PO P8KqlDQCLjag== X-IronPort-AV: E=Sophos;i="5.82,243,1613462400"; d="scan'208";a="464063728" Received: from eassadia-mobl1.amr.corp.intel.com (HELO skuppusw-mobl5.amr.corp.intel.com) ([10.254.4.68]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 22 Apr 2021 12:24:47 -0700 From: Kuppuswamy Sathyanarayanan To: Rafael J Wysocki , Thomas Gleixner , Ingo Molnar , "H . Peter Anvin" , Peter Zijlstra Cc: Len Brown , Robert Moore , Erik Kaneda , linux-acpi@vger.kernel.org, devel@acpica.org, linux-kernel@vger.kernel.org, x86@kernel.org, Kuppuswamy Sathyanarayanan , Sean Christopherson , Andi Kleen Subject: [PATCH 3/3] x86/acpi, x86/boot: Add multiprocessor wake-up support Date: Thu, 22 Apr 2021 12:24:41 -0700 Message-Id: <20210422192442.706906-4-sathyanarayanan.kuppuswamy@linux.intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210422192442.706906-1-sathyanarayanan.kuppuswamy@linux.intel.com> References: <20210422192442.706906-1-sathyanarayanan.kuppuswamy@linux.intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org As per ACPI specification r6.4, sec 5.2.12.19, a new sub structure – multiprocessor wake-up structure - is added to the ACPI Multiple APIC Description Table (MADT) to describe the information of the mailbox. If a platform firmware produces the multiprocessor wake-up structure, then OS may use this new mailbox-based mechanism to wake up the APs. Add ACPI MADT wake table parsing support for x86 platform and if MADT wake table is present, update apic->wakeup_secondary_cpu with new API which uses MADT wake mailbox to wake-up CPU. Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson Signed-off-by: Kuppuswamy Sathyanarayanan Reviewed-by: Andi Kleen --- arch/x86/include/asm/apic.h | 3 ++ arch/x86/kernel/acpi/boot.c | 56 +++++++++++++++++++++++++++++++++ arch/x86/kernel/apic/probe_32.c | 8 +++++ arch/x86/kernel/apic/probe_64.c | 8 +++++ 4 files changed, 75 insertions(+) diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h index 412b51e059c8..3e94e1f402ea 100644 --- a/arch/x86/include/asm/apic.h +++ b/arch/x86/include/asm/apic.h @@ -487,6 +487,9 @@ static inline unsigned int read_apic_id(void) return apic->get_apic_id(reg); } +typedef int (*wakeup_cpu_handler)(int apicid, unsigned long start_eip); +extern void acpi_wake_cpu_handler_update(wakeup_cpu_handler handler); + extern int default_apic_id_valid(u32 apicid); extern int default_acpi_madt_oem_check(char *, char *); extern void default_setup_apic_routing(void); diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c index 14cd3186dc77..a4a6b97910e1 100644 --- a/arch/x86/kernel/acpi/boot.c +++ b/arch/x86/kernel/acpi/boot.c @@ -65,6 +65,9 @@ int acpi_fix_pin2_polarity __initdata; static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE; #endif +static struct acpi_madt_multiproc_wakeup_mailbox *acpi_mp_wake_mailbox; +static u64 acpi_mp_wake_mailbox_paddr; + #ifdef CONFIG_X86_IO_APIC /* * Locks related to IOAPIC hotplug @@ -329,6 +332,29 @@ acpi_parse_lapic_nmi(union acpi_subtable_headers * header, const unsigned long e return 0; } +static void acpi_mp_wake_mailbox_init(void) +{ + if (acpi_mp_wake_mailbox) + return; + + acpi_mp_wake_mailbox = memremap(acpi_mp_wake_mailbox_paddr, + sizeof(*acpi_mp_wake_mailbox), MEMREMAP_WB); +} + +static int acpi_wakeup_cpu(int apicid, unsigned long start_ip) +{ + acpi_mp_wake_mailbox_init(); + + if (!acpi_mp_wake_mailbox) + return -EINVAL; + + WRITE_ONCE(acpi_mp_wake_mailbox->apic_id, apicid); + WRITE_ONCE(acpi_mp_wake_mailbox->wakeup_vector, start_ip); + WRITE_ONCE(acpi_mp_wake_mailbox->command, ACPI_MP_WAKE_COMMAND_WAKEUP); + + return 0; +} + #endif /*CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_IO_APIC @@ -1086,6 +1112,30 @@ static int __init acpi_parse_madt_lapic_entries(void) } return 0; } + +static int __init acpi_parse_mp_wake(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_multiproc_wakeup *mp_wake; + + if (acpi_mp_wake_mailbox) + return -EINVAL; + + if (!IS_ENABLED(CONFIG_SMP)) + return -ENODEV; + + mp_wake = (struct acpi_madt_multiproc_wakeup *) header; + if (BAD_MADT_ENTRY(mp_wake, end)) + return -EINVAL; + + acpi_table_print_madt_entry(&header->common); + + acpi_mp_wake_mailbox_paddr = mp_wake->base_address; + + acpi_wake_cpu_handler_update(acpi_wakeup_cpu); + + return 0; +} #endif /* CONFIG_X86_LOCAL_APIC */ #ifdef CONFIG_X86_IO_APIC @@ -1284,6 +1334,12 @@ static void __init acpi_process_madt(void) smp_found_config = 1; } + + /* + * Parse MADT MP Wake entry. + */ + acpi_table_parse_madt(ACPI_MADT_TYPE_MULTIPROC_WAKEUP, + acpi_parse_mp_wake, 1); } if (error == -EINVAL) { /* diff --git a/arch/x86/kernel/apic/probe_32.c b/arch/x86/kernel/apic/probe_32.c index a61f642b1b90..d450014841b2 100644 --- a/arch/x86/kernel/apic/probe_32.c +++ b/arch/x86/kernel/apic/probe_32.c @@ -207,3 +207,11 @@ int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id) } return 0; } + +void __init acpi_wake_cpu_handler_update(wakeup_cpu_handler handler) +{ + struct apic **drv; + + for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) + (*drv)->wakeup_secondary_cpu = handler; +} diff --git a/arch/x86/kernel/apic/probe_64.c b/arch/x86/kernel/apic/probe_64.c index c46720f185c0..986dbb68d3c4 100644 --- a/arch/x86/kernel/apic/probe_64.c +++ b/arch/x86/kernel/apic/probe_64.c @@ -50,3 +50,11 @@ int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id) } return 0; } + +void __init acpi_wake_cpu_handler_update(wakeup_cpu_handler handler) +{ + struct apic **drv; + + for (drv = __apicdrivers; drv < __apicdrivers_end; drv++) + (*drv)->wakeup_secondary_cpu = handler; +}