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[RFC,v1,03/10] acpi: Introduce SSE in HEST notification types

Message ID 20250227123628.2931490-4-hchauhan@ventanamicro.com (mailing list archive)
State New
Headers show
Series Add RAS support for RISC-V architecture | expand

Commit Message

Himanshu Chauhan Feb. 27, 2025, 12:36 p.m. UTC 
Introduce a new HEST notification type for RISC-V SSE events.
The GHES entry's notification structure contains the notification
to be used for a given error source. For error sources delivering
events over SSE, it should contain the new SSE notification type.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
---
 include/acpi/actbl1.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)
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Patch

diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h
index 387fc821703a..df577bf25423 100644
--- a/include/acpi/actbl1.h
+++ b/include/acpi/actbl1.h
@@ -1515,7 +1515,8 @@  enum acpi_hest_notify_types {
 	ACPI_HEST_NOTIFY_SEI = 9,	/* ACPI 6.1 */
 	ACPI_HEST_NOTIFY_GSIV = 10,	/* ACPI 6.1 */
 	ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11,	/* ACPI 6.2 */
-	ACPI_HEST_NOTIFY_RESERVED = 12	/* 12 and greater are reserved */
+	ACPI_HEST_NOTIFY_SSE = 12, /* RISCV SSE */
+	ACPI_HEST_NOTIFY_RESERVED = 13	/* 13 and greater are reserved */
 };
 
 /* Values for config_write_enable bitfield above */