===================================================================
@@ -46,6 +46,18 @@ static inline void print_ioh_resources(s
#define RANGE_NUM 16
+static void __devinit subtract_mmconf(struct range *range, int nr)
+{
+ struct pci_mmcfg_region *cfg;
+
+ if (list_empty(&pci_mmcfg_list))
+ return;
+
+ list_for_each_entry(cfg, &pci_mmcfg_list, list)
+ subtract_range(range, nr, cfg->res.start,
+ cfg->res.end + 1);
+}
+
static void __devinit pci_root_bus_res(struct pci_dev *dev)
{
u16 word;
@@ -58,6 +70,9 @@ static void __devinit pci_root_bus_res(s
struct range range[RANGE_NUM];
int i;
+ if (list_empty(&pci_mmcfg_list))
+ return;
+
/* some sys doesn't get mmconf enabled */
if (dev->cfg_size < 0x200)
return;
@@ -96,6 +111,7 @@ static void __devinit pci_root_bus_res(s
subtract_range(range, RANGE_NUM, vt_base, vt_end + 1);
}
+ subtract_mmconf(range, RANGE_NUM);
for (i = 0; i < RANGE_NUM; i++) {
if (!range[i].end)
continue;
@@ -112,8 +128,18 @@ static void __devinit pci_root_bus_res(s
mmioh_base |= ((u64)(dword & 0x7ffff)) << 32;
pci_read_config_dword(dev, IOH_LMMIOH_LIMITU, &dword);
mmioh_end |= ((u64)(dword & 0x7ffff)) << 32;
- update_res(info, cap_resource(mmioh_base), cap_resource(mmioh_end),
- IORESOURCE_MEM, 0);
+ memset(range, 0, sizeof(range));
+ add_range(range, RANGE_NUM, 0, mmioh_base, mmioh_end + 1);
+ /* mmconf could be above 4g */
+ subtract_mmconf(range, RANGE_NUM);
+ for (i = 0; i < RANGE_NUM; i++) {
+ if (!range[i].end)
+ continue;
+
+ update_res(info, cap_resource(range[i].start),
+ cap_resource(range[i].end - 1),
+ IORESOURCE_MEM, 0);
+ }
print_ioh_resources(info);
}
===================================================================
@@ -14,7 +14,8 @@ obj-$(CONFIG_X86_VISWS) += visws.o
obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
obj-y += common.o early.o
-obj-y += amd_bus.o bus_numa.o intel_bus.o
+obj-y += amd_bus.o bus_numa.o
+obj-$(CONFIG_PCI_MMCONFIG) += intel_bus.o
ifeq ($(CONFIG_PCI_DEBUG),y)
EXTRA_CFLAGS += -DDEBUG