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[82.243.161.21]) by smtp.googlemail.com with ESMTPSA id d4sm2721909wrp.89.2018.11.29.08.45.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 29 Nov 2018 08:45:30 -0800 (PST) From: Jerome Brunet To: Neil Armstrong , Carlo Caione , Kevin Hilman Subject: [PATCH 0/3] arm64: dts: meson: add clock controllers input clocks Date: Thu, 29 Nov 2018 17:45:21 +0100 Message-Id: <20181129164524.18670-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181129_084543_416581_4D543038 X-CRM114-Status: UNSURE ( 7.74 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Jerome Brunet Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patchset is the first step that needs to be done so the amlogic clock controllers properly claim their input clocks through instead of relying on fixed names. I'll be waiting for this hit mainline before sending the related driver changes. Jerome Brunet (3): dt-bindings: clk: meson: add ao controller clock inputs dt-bindings: clk: meson: add main controller clock input arm64: dts: meson: add clock controller clock inputs .../devicetree/bindings/clock/amlogic,gxbb-aoclkc.txt | 8 +++++++- .../devicetree/bindings/clock/amlogic,gxbb-clkc.txt | 3 +++ arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 3 +++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 3 +++ arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 3 +++ 5 files changed, 19 insertions(+), 1 deletion(-)