[v4,0/1] Meson8b RGMII Ethernet pin fixes

Message

Martin Blumenstingl Jan. 12, 2019, 12:59 p.m. UTC

This series fixes Ethernet RX performance on boards using a Gigabit PHY
and a Meson8b SoC.
We now reach near Gigabit speeds in RX and TX direction (when data is
flowing in only one direction, full-duplex seems be have another issue
which is probably not related to pinctrl).


Changes since v3 at [2]:
- Collected Emiliano's and Kevin's Reviewed-by/Tested-by
- dropped patch #2 (.dts patch) as it has been applied by Kevin already
- include the linux-gpio mailing list this time


Changes since v2 at [1]:
- Thanks to Jianxin for providing the documentation for the two missing
  bits in pin mux register 7
- added a patch to add the missing eth_rxd2 and eth_rxd3 pin groups to
  the pinctrl-meson8b driver
- update the meson8.dtsi patch to include the eth_rxd2 and eth_rxd3 pin
  groups on top of the previous change which only removed eth_txd0_1
  and eth_txd1_1 (including the patch description)
- update subject of the cover-letter and the meson8b.dtsi patch


Changes since v1 at [0]:
- rebased so it applies on top of "ARM: dts: meson: meson8b: add the CPU
  OPP tables" which will be part of v4.20-rc1 once the arm-soc tree is
  merged into mainline
- updated patch description with more details


[0] http://lists.infradead.org/pipermail/linux-amlogic/2018-May/007274.html
[1] https://patchwork.kernel.org/cover/10744709/
[2] https://patchwork.kernel.org/cover/10744905/


Martin Blumenstingl (1):
  pinctrl: meson: meson8b: add the eth_rxd2 and eth_rxd3 pins

 drivers/pinctrl/meson/pinctrl-meson8b.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)