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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id y40sm17737158wrd.96.2019.05.14.02.16.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 May 2019 02:16:14 -0700 (PDT) From: Jerome Brunet To: Kevin Hilman Subject: [PATCH 0/3] arm64: dts: meson: g12a: add mmc B and C Date: Tue, 14 May 2019 11:16:08 +0200 Message-Id: <20190514091611.15278-1-jbrunet@baylibre.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-Patchwork-Bot: notify X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190514_021616_610480_11C743A9 X-CRM114-Status: UNSURE ( 7.83 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Jerome Brunet Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patchset adds the MMC controller B and C to the g12a SoC as well as the u200 and sei510 boards. MMC controller A has been left out on purpose. This controller is special on this SoC family and will be added later on. Notice the use of the pinconf DT property 'drive-strength-microamp'. Support for this property is not yet merged in meson pinctrl driver but the DT part as been acked by the DT maintainer [0] so it should be safe to use. [0]: https://lkml.kernel.org/r/20190513152451.GA25690@bogus Jerome Brunet (3): arm64: dts: meson: g12a: add mmc nodes arm64: dts: meson: u200: add sd and emmc arm64: dts: meson: sei510: add sd and emmc .../boot/dts/amlogic/meson-g12a-sei510.dts | 42 ++++++ .../boot/dts/amlogic/meson-g12a-u200.dts | 42 ++++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 124 ++++++++++++++++++ 3 files changed, 208 insertions(+) Reviewed-by: Neil Armstrong