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[2a01:c23:b9f5:df00:f22f:74ff:fe21:725]) by smtp.googlemail.com with ESMTPSA id f3sm2741310wml.11.2021.10.20.12.51.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 20 Oct 2021 12:51:27 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org, linux-phy@lists.infradead.org, vkoul@kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org, kishon@ti.com, Martin Blumenstingl Subject: [PATCH v3 0/2] phy: Add support for the HDMI TX PHY on Meson8/8b/8m2 Date: Wed, 20 Oct 2021 21:51:05 +0200 Message-Id: <20211020195107.1564533-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20211020_125129_849268_61685255 X-CRM114-Status: GOOD ( 18.31 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Amlogic Meson8/8b/8m2 SoCs embed a HDMI TX PHY. Unfortunately there is no (public) documentation for this hardware. The best thing we have is the 3.10 vendor kernel, which unfortunately doesn't document most register bits (only a few are named there, the rest is all magic numbers). It is possible that this is a TranSwitch HDMI TX PHY based core, but this is pure speculation. Adding a driver for the HDMI TX PHY gets us one step closer to video output on these older SoCs. Changes since v2 at [1]: - Use "amlogic,meson8-hdmi-tx-phy" as fallback compatible string for Meson8b and Meson8m2. This affects both patches in this series and it's the reason why I dropped Rob's Reviewed-by. - Add a comment to the driver explaining that there no detailed register documentation (naming) is available and that's why we also use some magic values in the driver as suggested by Vinod. - Hardcode the HHI_HDMI_PHY_CNTL* register offsets (from the HHI area) directly in the driver instead of using some incomplete "reg" property parsing code. This also makes it easier to compare the register values with the vendor kernel sources and datasheets as the offset doesn't have to be added/subtracted when comparing the values. Changes since v1 at [0]: - add a reg property to the dt-bindings - parse the reg property (register offset) in the driver - update copyright year to 2021 (spotted by Vinod, thanks!) - drop "default ARCH_MESON" from the Kconfig entry [0] https://patchwork.kernel.org/project/linux-amlogic/cover/20210604190338.2248295-1-martin.blumenstingl@googlemail.com/ [1] https://patchwork.kernel.org/project/linux-amlogic/cover/20210629182047.893415-1-martin.blumenstingl@googlemail.com/ Martin Blumenstingl (2): dt-bindings: phy: Add the Amlogic Meson8 HDMI TX PHY bindings phy: amlogic: Add a new driver for the HDMI TX PHY on Meson8/8b/8m2 .../phy/amlogic,meson8-hdmi-tx-phy.yaml | 65 +++++++ drivers/phy/amlogic/Kconfig | 10 ++ drivers/phy/amlogic/Makefile | 1 + drivers/phy/amlogic/phy-meson8-hdmi-tx.c | 160 ++++++++++++++++++ 4 files changed, 236 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson8-hdmi-tx-phy.yaml create mode 100644 drivers/phy/amlogic/phy-meson8-hdmi-tx.c