From patchwork Thu Aug 18 10:08:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 9287221 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 39BCC60574 for ; Thu, 18 Aug 2016 10:09:38 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2ACE428C7B for ; Thu, 18 Aug 2016 10:09:38 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 1FA3F28F53; Thu, 18 Aug 2016 10:09:38 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.1 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_MED,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.9]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8BA7F28C7B for ; Thu, 18 Aug 2016 10:09:37 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.85_2 #1 (Red Hat Linux)) id 1baKGQ-0006LO-0q; Thu, 18 Aug 2016 10:09:30 +0000 Received: from mail-wm0-x22b.google.com ([2a00:1450:400c:c09::22b]) by bombadil.infradead.org with esmtps (Exim 4.85_2 #1 (Red Hat Linux)) id 1baKGH-00066N-Hq for linux-amlogic@lists.infradead.org; Thu, 18 Aug 2016 10:09:27 +0000 Received: by mail-wm0-x22b.google.com with SMTP id o80so24499458wme.1 for ; Thu, 18 Aug 2016 03:09:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zssSGWiZ3ouYspH3TaZZs5UWw9eWkJuaUj5CWDJs/JI=; b=cE5YB7O5+YuUX+FkE1Vk3GT03UN2mHYSCSUTJZ+aZ1J+ggDn4FtvX0v3MzrL1N7NVl kIX7ko1l+x0yKbkI3G2oZNeZQ6jkx35W9uIazWiX20haskD/D/hON7mHSmfPrMbBFWtw ArWigbISBv3A27p+dpwf3SsRNJSOBd8CgrdHIAGTN6xmPv1qzfZZmw7MD2vpEaia3q60 KaGizR5Rqd38p2hXLz6cSo7ggfX0Ug5RDhRVj5JGrtOhptFJXC2Cj6F3gpQbUfp9StV9 3Me/KLbliOYV6lJXVIdBY4p0kQhnHEfDogq73xP+J7fliMl9QppH/APV4CAgGZ/bVwaZ 6MNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zssSGWiZ3ouYspH3TaZZs5UWw9eWkJuaUj5CWDJs/JI=; b=AwSxwIEUIvlXHPG3nhN3FXsuH45JYeZII0RHVZ3Onb4d1ywLknfqUEZeP7+mYqBrXH HH2CBvmYjPnwfoknjgE2QPdiShTJcfGb+KUic0vhP7stVd3eCevOnVopoQaFQweSJONA Hk/6ebVjaZ0bnEDR3b1y/2tfgx3MJlPoeTGcCH6WD8QoGCXq56eKISd8nAJcc/K9PFY5 K+x6dNnilukF3xTLjM7ZCE2Q10FWQ+tPxhdA6yXtiBavXKAOf74dGAlusjOYdpqSt4yJ k2oUvoyRxkm72KVsFllmEQYzc/BbNaIXdkk/ffgPIHlfuLJj1Ni9BjrfRm9palvn/4J+ P0jQ== X-Gm-Message-State: AEkooutZMrnPjzrcUOxGYT4aW0A4rHgs7uYi+WanLDE6Eo5c0XsWyr7DeTifQEmD6kKlm8tR X-Received: by 10.28.46.134 with SMTP id u128mr1850196wmu.41.1471514939968; Thu, 18 Aug 2016 03:08:59 -0700 (PDT) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id za2sm1480425wjb.34.2016.08.18.03.08.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 18 Aug 2016 03:08:59 -0700 (PDT) From: Neil Armstrong To: linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, sboyd@codeaurora.org, mturquette@baylibre.com Subject: [PATCH v2 1/3] clk: meson: Add GXBB AO Clock and Reset controller driver Date: Thu, 18 Aug 2016 12:08:46 +0200 Message-Id: <1471514928-3341-2-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1471514928-3341-1-git-send-email-narmstrong@baylibre.com> References: <1471514928-3341-1-git-send-email-narmstrong@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20160818_030921_950409_B0DBF731 X-CRM114-Status: GOOD ( 18.92 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Neil Armstrong MIME-Version: 1.0 Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Adds a Clock and Reset controller driver for the Always-On part of the Amlogic Meson GXBB SoC. It exports paired Clocks and Resets lines that will be used by peripherals in the Always-On subsystem. Signed-off-by: Neil Armstrong --- drivers/clk/meson/Makefile | 2 +- drivers/clk/meson/gxbb-aoclk.c | 192 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 193 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/meson/gxbb-aoclk.c diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 197e401..d4cd4a3 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -4,4 +4,4 @@ obj-$(CONFIG_COMMON_CLK_AMLOGIC) += clk-pll.o clk-cpu.o clk-mpll.o obj-$(CONFIG_COMMON_CLK_MESON8B) += meson8b-clkc.o -obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o +obj-$(CONFIG_COMMON_CLK_GXBB) += gxbb.o gxbb-aoclk.o diff --git a/drivers/clk/meson/gxbb-aoclk.c b/drivers/clk/meson/gxbb-aoclk.c new file mode 100644 index 0000000..b989e4a --- /dev/null +++ b/drivers/clk/meson/gxbb-aoclk.c @@ -0,0 +1,192 @@ +/* + * This file is provided under a dual BSD/GPLv2 license. When using or + * redistributing this file, you may do so under either license. + * + * GPL LICENSE SUMMARY + * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of version 2 of the GNU General Public License as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see . + * The full GNU General Public License is included in this distribution + * in the file called COPYING. + * + * BSD LICENSE + * + * Copyright (c) 2016 BayLibre, SAS. + * Author: Neil Armstrong + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#include +#include +#include +#include +#include +#include +#include + +static DEFINE_SPINLOCK(gxbb_aoclk_lock); + +struct gxbb_aoclk_reset_controller { + struct reset_controller_dev reset; + unsigned int *data; + void __iomem *base; +}; + +static int gxbb_aoclk_do_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct gxbb_aoclk_reset_controller *reset = + container_of(rcdev, struct gxbb_aoclk_reset_controller, reset); + + writel(BIT(reset->data[id]), reset->base); + + return 0; +} + +static const struct reset_control_ops gxbb_aoclk_reset_ops = { + .reset = gxbb_aoclk_do_reset, +}; + +#define GXBB_AO_GATE(_name, _bit) \ +static struct clk_gate _name##_ao = { \ + .reg = (void __iomem *)0, \ + .bit_idx = (_bit), \ + .lock = &gxbb_aoclk_lock, \ + .hw.init = &(struct clk_init_data) { \ + .name = #_name "_ao", \ + .ops = &clk_gate_ops, \ + .parent_names = (const char *[]){ "clk81" }, \ + .num_parents = 1, \ + .flags = (CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED), \ + }, \ +} + +GXBB_AO_GATE(remote, 0); +GXBB_AO_GATE(i2c_master, 1); +GXBB_AO_GATE(i2c_slave, 2); +GXBB_AO_GATE(uart1, 3); +GXBB_AO_GATE(uart2, 5); +GXBB_AO_GATE(ir_blaster, 6); + +static unsigned int gxbb_aoclk_reset[] = { + [RESET_AO_REMOTE] = 16, + [RESET_AO_I2C_MASTER] = 18, + [RESET_AO_I2C_SLAVE] = 19, + [RESET_AO_UART1] = 17, + [RESET_AO_UART2] = 22, + [RESET_AO_IR_BLASTER] = 23, +}; + +static struct clk_gate *gxbb_aoclk_gate[] = { + [CLKID_AO_REMOTE] = &remote_ao, + [CLKID_AO_I2C_MASTER] = &i2c_master_ao, + [CLKID_AO_I2C_SLAVE] = &i2c_slave_ao, + [CLKID_AO_UART1] = &uart1_ao, + [CLKID_AO_UART2] = &uart2_ao, + [CLKID_AO_IR_BLASTER] = &ir_blaster_ao, +}; + +static struct clk_hw_onecell_data gxbb_aoclk_onecell_data = { + .hws = { + [CLKID_AO_REMOTE] = &remote_ao.hw, + [CLKID_AO_I2C_MASTER] = &i2c_master_ao.hw, + [CLKID_AO_I2C_SLAVE] = &i2c_slave_ao.hw, + [CLKID_AO_UART1] = &uart1_ao.hw, + [CLKID_AO_UART2] = &uart2_ao.hw, + [CLKID_AO_IR_BLASTER] = &ir_blaster_ao.hw, + }, + .num = ARRAY_SIZE(gxbb_aoclk_gate), +}; + +static int gxbb_aoclkc_probe(struct platform_device *pdev) +{ + struct resource *res; + void __iomem *base; + int ret, clkid; + struct device *dev = &pdev->dev; + struct gxbb_aoclk_reset_controller *rstc; + + rstc = devm_kzalloc(dev, sizeof(rstc), GFP_KERNEL); + if (!rstc) + return -ENOMEM; + + /* Generic clocks */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return PTR_ERR(base); + + /* Reset Controller */ + rstc->base = base; + rstc->data = gxbb_aoclk_reset; + rstc->reset.ops = &gxbb_aoclk_reset_ops; + rstc->reset.nr_resets = ARRAY_SIZE(gxbb_aoclk_reset); + rstc->reset.of_node = dev->of_node; + ret = devm_reset_controller_register(dev, &rstc->reset); + + /* + * Populate base address and register all clks + */ + for (clkid = 0; clkid < gxbb_aoclk_onecell_data.num; clkid++) { + gxbb_aoclk_gate[clkid]->reg = base; + + ret = devm_clk_hw_register(dev, + gxbb_aoclk_onecell_data.hws[clkid]); + if (ret) + return ret; + } + + return of_clk_add_hw_provider(dev->of_node, of_clk_hw_onecell_get, + &gxbb_aoclk_onecell_data); +} + +static const struct of_device_id gxbb_aoclkc_match_table[] = { + { .compatible = "amlogic,gxbb-aoclkc" }, + { } +}; + +static struct platform_driver gxbb_aoclkc_driver = { + .probe = gxbb_aoclkc_probe, + .driver = { + .name = "gxbb-aoclkc", + .of_match_table = gxbb_aoclkc_match_table, + }, +}; + +builtin_platform_driver(gxbb_aoclkc_driver);