| Message ID | 1535096006-152091-2-git-send-email-hanjie.lin@amlogic.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/2] dt-bindings: phy: add DT bindings for Amlogic Meson PCIe Phy controller | expand |
On Fri, 24 Aug 2018 15:33:25 +0800, Hanjie Lin wrote: > From: Yue Wang <yue.wang@amlogic.com> > > The Meson-PCIE-PHY controller supports the 5-Gbps data rate > of the PCI Express Gen 2 specification and is backward compatible > with the 2.5-Gbps Gen 1.1 specification with only > inferred idle detection supported on Amlogic SoCs. > > Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com> > Signed-off-by: Yue Wang <yue.wang@amlogic.com> > --- > .../bindings/phy/amlogic,meson-pcie-phy.txt | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt > Reviewed-by: Rob Herring <robh@kernel.org>
On 2018/8/29 8:37, Rob Herring wrote: > On Fri, 24 Aug 2018 15:33:25 +0800, Hanjie Lin wrote: >> From: Yue Wang <yue.wang@amlogic.com> >> >> The Meson-PCIE-PHY controller supports the 5-Gbps data rate >> of the PCI Express Gen 2 specification and is backward compatible >> with the 2.5-Gbps Gen 1.1 specification with only >> inferred idle detection supported on Amlogic SoCs. >> >> Signed-off-by: Hanjie Lin <hanjie.lin@amlogic.com> >> Signed-off-by: Yue Wang <yue.wang@amlogic.com> >> --- >> .../bindings/phy/amlogic,meson-pcie-phy.txt | 21 +++++++++++++++++++++ >> 1 file changed, 21 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt >> > > Reviewed-by: Rob Herring <robh@kernel.org> > > . > Thanks for the review. As described during the discussion [0], we consider it's too overkill to have a dedicated phy driver which only process reset line. So we will abandon phy driver and integrate phy reset into the controller driver int the next version. [0] https://lkml.kernel.org/r/1535096165-45827-1-git-send-email-hanjie.lin@amlogic.
diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt b/Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt new file mode 100644 index 0000000..e2f0a27 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-pcie-phy.txt @@ -0,0 +1,21 @@ +* Amlogic Meson AXG PCIE PHY binding + +Required properties: +- compatible: Should be + - "amlogic,axg-pcie-phy" +- #phys-cells: must be 0 (see phy-bindings.txt in this directory) +- reg: The base address and length of the registers +- resets: phandle to the reset lines +- reset-names: must contain "phy" and "peripheral" + - "phy" PHY reset +Optional properties: +- phy-supply: see phy-bindings.txt in this directory + +Example: + pcie_phy: pcie-phy@ff644000 { + #phy-cells = <0>; + compatible = "amlogic,axg-pcie-phy"; + reg = <0x0 0xff644000 0x0 0x2000>; + resets = <&reset RESET_PCIE_PHY>; + reset-names = "phy"; + };