| Message ID | 20170122181714.6259-2-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
On Sun, Jan 22, 2017 at 07:17:12PM +0100, Martin Blumenstingl wrote: > This adds the devicetree binding documentation for the SAR ADC found in > Amlogic Meson SoCs. > Currently only the GXBB, GXL and GXM SoCs are supported. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > Tested-by: Neil Armstrong <narmstrong@baylibre.com> > Reviewed-by: Andreas Färber <afaerber@suse.de> > --- > .../bindings/iio/adc/amlogic,meson-saradc.txt | 32 ++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > create mode 100644 Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt Acked-by: Rob Herring <robh@kernel.org>
On 23/01/17 20:44, Rob Herring wrote: > On Sun, Jan 22, 2017 at 07:17:12PM +0100, Martin Blumenstingl wrote: >> This adds the devicetree binding documentation for the SAR ADC found in >> Amlogic Meson SoCs. >> Currently only the GXBB, GXL and GXM SoCs are supported. >> >> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> >> Tested-by: Neil Armstrong <narmstrong@baylibre.com> >> Reviewed-by: Andreas Färber <afaerber@suse.de> >> --- >> .../bindings/iio/adc/amlogic,meson-saradc.txt | 32 ++++++++++++++++++++++ >> 1 file changed, 32 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt > > Acked-by: Rob Herring <robh@kernel.org> > Applied to the togreg branch of iio.git - initially pushed out as testing. Thanks, Jonathan
diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt new file mode 100644 index 000000000000..f9e3ff2c656e --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt @@ -0,0 +1,32 @@ +* Amlogic Meson SAR (Successive Approximation Register) A/D converter + +Required properties: +- compatible: depending on the SoC this should be one of: + - "amlogic,meson-gxbb-saradc" for GXBB + - "amlogic,meson-gxl-saradc" for GXL + - "amlogic,meson-gxm-saradc" for GXM + along with the generic "amlogic,meson-saradc" +- reg: the physical base address and length of the registers +- clocks: phandle and clock identifier (see clock-names) +- clock-names: mandatory clocks: + - "clkin" for the reference clock (typically XTAL) + - "core" for the SAR ADC core clock + optional clocks: + - "sana" for the analog clock + - "adc_clk" for the ADC (sampling) clock + - "adc_sel" for the ADC (sampling) clock mux +- vref-supply: the regulator supply for the ADC reference voltage +- #io-channel-cells: must be 1, see ../iio-bindings.txt + +Example: + saradc: adc@8680 { + compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; + #io-channel-cells = <1>; + reg = <0x0 0x8680 0x0 0x34>; + clocks = <&xtal>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SANA>, + <&clkc CLKID_SAR_ADC_CLK>, + <&clkc CLKID_SAR_ADC_SEL>; + clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; + };