Message ID | 20171120100851.17366-2-yixun.lan@amlogic.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
On Mon, Nov 20, 2017 at 11:08 AM, Yixun Lan <yixun.lan@amlogic.com> wrote: > From: Xingyu Chen <xingyu.chen@amlogic.com> > > Add compatibles for Amlogic Meson AXG pin controllers > > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> > Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> > Signed-off-by: Yixun Lan <yixun.lan@amlogic.com> Patch applied with Rob's ACK. Yours, Linus Walleij
diff --git a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt index 2392557ede27..2c12f9789116 100644 --- a/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt @@ -9,6 +9,8 @@ Required properties for the root node: "amlogic,meson-gxbb-aobus-pinctrl" "amlogic,meson-gxl-periphs-pinctrl" "amlogic,meson-gxl-aobus-pinctrl" + "amlogic,meson-axg-periphs-pinctrl" + "amlogic,meson-axg-aobus-pinctrl" - reg: address and size of registers controlling irq functionality === GPIO sub-nodes ===