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Received: from mail.kernel.org ([198.145.29.99]) by casper.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gN3aZ-0003TZ-JW for linux-amlogic@lists.infradead.org; Wed, 14 Nov 2018 22:24:50 +0000 Received: from sasha-vm.mshome.net (unknown [64.114.255.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 313C122529; Wed, 14 Nov 2018 22:24:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1542234276; bh=8WrDsZ4kKm/oVsjSplgvqLOtdVCKMMm0ezO0p/64XwE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oLs/Z2hRPnwqC1uaXsVcM2jviNMAmyTMOj4CrS2KlYOSPN1/FLl1MIWjhq4qYYQWR D1yfXiFPd9JeCZWPBTJKJnwOzK4nt9YLJjpW5436erl2dD/Q2jfvr1kfWWCCwS4H1Z UDJ2JqwtO9ACUGluWvDrxLRYfwZzwDPlSpdJFsrw= From: Sasha Levin To: stable@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH AUTOSEL 4.18 37/59] clk: meson: axg: mark fdiv2 and fdiv3 as critical Date: Wed, 14 Nov 2018 17:23:09 -0500 Message-Id: <20181114222335.99339-37-sashal@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181114222335.99339-1-sashal@kernel.org> References: <20181114222335.99339-1-sashal@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181114_222447_797555_DAEC773C X-CRM114-Status: GOOD ( 13.51 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephen Boyd , Sasha Levin , linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org, Jerome Brunet MIME-Version: 1.0 Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Jerome Brunet [ Upstream commit d6ee1e7e9004d3d246cdfa14196989e0a9466c16 ] Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor uses the fdiv2 and fdiv3 to, among other things, provide the cpu clock. Until clock hand-off mechanism makes its way to CCF and the generic SCPI claims platform specific clocks, these clocks must be marked as critical to make sure they are never disabled when needed by the co-processor. Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates") Signed-off-by: Jerome Brunet Acked-by: Neil Armstrong Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin --- drivers/clk/meson/axg.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/clk/meson/axg.c b/drivers/clk/meson/axg.c index bd4dbc696b88..cfd26fd7e404 100644 --- a/drivers/clk/meson/axg.c +++ b/drivers/clk/meson/axg.c @@ -320,6 +320,7 @@ static struct clk_regmap axg_fclk_div2 = { .ops = &clk_regmap_gate_ops, .parent_names = (const char *[]){ "fclk_div2_div" }, .num_parents = 1, + .flags = CLK_IS_CRITICAL, }, }; @@ -344,6 +345,18 @@ static struct clk_regmap axg_fclk_div3 = { .ops = &clk_regmap_gate_ops, .parent_names = (const char *[]){ "fclk_div3_div" }, .num_parents = 1, + /* + * FIXME: + * This clock, as fdiv2, is used by the SCPI FW and is required + * by the platform to operate correctly. + * Until the following condition are met, we need this clock to + * be marked as critical: + * a) The SCPI generic driver claims and enable all the clocks + * it needs + * b) CCF has a clock hand-off mechanism to make the sure the + * clock stays on until the proper driver comes along + */ + .flags = CLK_IS_CRITICAL, }, };