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[2003:dc:d732:f500:597d:16a6:3157:3221]) by smtp.googlemail.com with ESMTPSA id g198sm11495337wmd.23.2018.11.23.11.53.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Nov 2018 11:53:24 -0800 (PST) From: Martin Blumenstingl To: carlo@caione.org, khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH 1/6] ARM: meson: select HAVE_ARM_TWD and ARM_GLOBAL_TIMER Date: Fri, 23 Nov 2018 20:53:06 +0100 Message-Id: <20181123195311.4578-2-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.19.2 In-Reply-To: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> References: <20181123195311.4578-1-martin.blumenstingl@googlemail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181123_115336_999592_EB136CBB X-CRM114-Status: UNSURE ( 9.18 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP The 32-bit Meson SoCs use multiple Cortex-A9 (Meson8 and Meson8m2) or Cortex-A5 (Meson8b) CPU cores. These come with the "ARM global timer" and "Timer-Watchdog" (aka TWD, which provides both a per-cpu local timer and watchdog). Selecting ARM_GLOBAL_TIMER and HAVE_ARM_TWD allows us to add the timers to the SoC.dtsi files. Signed-off-by: Martin Blumenstingl --- arch/arm/mach-meson/Kconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-meson/Kconfig b/arch/arm/mach-meson/Kconfig index d51cfda953d4..b16831697183 100644 --- a/arch/arm/mach-meson/Kconfig +++ b/arch/arm/mach-meson/Kconfig @@ -4,12 +4,14 @@ menuconfig ARCH_MESON select GPIOLIB select GENERIC_IRQ_CHIP select ARM_GIC + select ARM_GLOBAL_TIMER select CACHE_L2X0 select PINCTRL select PINCTRL_MESON select COMMON_CLK select COMMON_CLK_AMLOGIC select HAVE_ARM_SCU if SMP + select HAVE_ARM_TWD if SMP if ARCH_MESON