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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id j33sm201888738wre.42.2019.08.06.06.05.14 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 06 Aug 2019 06:05:15 -0700 (PDT) From: Guillaume La Roque To: daniel.lezcano@linaro.org, khilman@baylibre.com Subject: [PATCH v3 5/6] arm64: dts: amlogic: odroid-n2: add minimal thermal zone Date: Tue, 6 Aug 2019 15:05:05 +0200 Message-Id: <20190806130506.8753-6-glaroque@baylibre.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190806130506.8753-1-glaroque@baylibre.com> References: <20190806130506.8753-1-glaroque@baylibre.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190806_060517_090320_F9DBC033 X-CRM114-Status: GOOD ( 10.14 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org MIME-Version: 1.0 Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add minimal thermal zone for two temperature sensor One is located close to the DDR and the other one is located close to the PLLs (between the CPU and GPU) Signed-off-by: Guillaume La Roque Acked-by: Martin Blumenstingl --- .../boot/dts/amlogic/meson-g12b-odroid-n2.dts | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts index 75ff8a7e373d..a7d73c0c8447 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-odroid-n2.dts @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "hardkernel,odroid-n2", "amlogic,g12b"; @@ -20,6 +21,55 @@ ethernet0 = ðmac; }; + thermal-zones { + cpu-thermal { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&cpu_temp>; + + trips { + cpu_critical: cpu-critical { + temperature = <110000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map { + trip = <&cpu_critical>; + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + ddr-thermal { + polling-delay = <1000>; + polling-delay-passive = <100>; + thermal-sensors = <&ddr_temp>; + + trips { + ddr_critical: ddr-critical { + temperature = <110000>; /* millicelsius */ + hysteresis = <2000>; /* millicelsius */ + type = "critical"; + }; + }; + + cooling-maps { + map { + trip = <&ddr_critical>; + cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -288,6 +338,7 @@ operating-points-v2 = <&cpu_opp_table_0>; clocks = <&clkc CLKID_CPU_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu1 { @@ -295,6 +346,7 @@ operating-points-v2 = <&cpu_opp_table_0>; clocks = <&clkc CLKID_CPU_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu100 { @@ -302,6 +354,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu101 { @@ -309,6 +362,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu102 { @@ -316,6 +370,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &cpu103 { @@ -323,6 +378,7 @@ operating-points-v2 = <&cpub_opp_table_1>; clocks = <&clkc CLKID_CPUB_CLK>; clock-latency = <50000>; + #cooling-cells = <2>; }; &ext_mdio { @@ -377,6 +433,10 @@ }; }; +&mali { + #cooling-cells = <2>; +}; + &hdmi_tx { status = "okay"; pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;