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Tue, 28 Apr 2020 05:50:43 -0700 (PDT) From: Neil Armstrong To: linux-media@vger.kernel.org, hverkuil-cisco@xs4all.nl Subject: [PATCH 1/3] media: meson: vdec: enable mcrcc for VP9 Date: Tue, 28 Apr 2020 14:50:34 +0200 Message-Id: <20200428125036.9401-2-narmstrong@baylibre.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200428125036.9401-1-narmstrong@baylibre.com> References: <20200428125036.9401-1-narmstrong@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200428_055046_839566_DBA8FCA5 X-CRM114-Status: GOOD ( 10.15 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:341 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxime Jourdan , linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+patchwork-linux-amlogic=patchwork.kernel.org@lists.infradead.org From: Maxime Jourdan The motion compensation reference cache controller allows caching parts of reference frames for faster decoding. Fixes: 00c43088aa68 ("media: meson: vdec: add VP9 decoder support") Signed-off-by: Maxime Jourdan Signed-off-by: Neil Armstrong --- drivers/staging/media/meson/vdec/codec_vp9.c | 31 ++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/staging/media/meson/vdec/codec_vp9.c b/drivers/staging/media/meson/vdec/codec_vp9.c index 60e4fc0052b3..897f5d7a6aad 100644 --- a/drivers/staging/media/meson/vdec/codec_vp9.c +++ b/drivers/staging/media/meson/vdec/codec_vp9.c @@ -854,6 +854,36 @@ static int codec_vp9_stop(struct amvdec_session *sess) return 0; } +/* + * Program LAST & GOLDEN frames into the motion compensation reference cache + * controller + */ +static void codec_vp9_set_mcrcc(struct amvdec_session *sess) +{ + struct amvdec_core *core = sess->core; + struct codec_vp9 *vp9 = sess->priv; + u32 val; + + /* Reset mcrcc */ + amvdec_write_dos(core, HEVCD_MCRCC_CTL1, 0x2); + /* Disable on I-frame */ + if (vp9->cur_frame->type == KEY_FRAME || vp9->cur_frame->intra_only) { + amvdec_write_dos(core, HEVCD_MCRCC_CTL1, 0x0); + return; + } + + amvdec_write_dos(core, HEVCD_MPP_ANC_CANVAS_ACCCONFIG_ADDR, BIT(1)); + val = amvdec_read_dos(core, HEVCD_MPP_ANC_CANVAS_DATA_ADDR) & 0xffff; + val |= (val << 16); + amvdec_write_dos(core, HEVCD_MCRCC_CTL2, val); + val = amvdec_read_dos(core, HEVCD_MPP_ANC_CANVAS_DATA_ADDR) & 0xffff; + val |= (val << 16); + amvdec_write_dos(core, HEVCD_MCRCC_CTL3, val); + + /* Enable mcrcc progressive-mode */ + amvdec_write_dos(core, HEVCD_MCRCC_CTL1, 0xff0); +} + static void codec_vp9_set_sao(struct amvdec_session *sess, struct vb2_buffer *vb) { @@ -1267,6 +1297,7 @@ static void codec_vp9_process_frame(struct amvdec_session *sess) amvdec_write_dos(core, HEVC_PARSER_PICTURE_SIZE, (vp9->height << 16) | vp9->width); + codec_vp9_set_mcrcc(sess); codec_vp9_set_sao(sess, &vp9->cur_frame->vbuf->vb2_buf); vp9_loop_filter_frame_init(core, &vp9->seg_4lf,