| Message ID | 20200429201644.1144546-8-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | dwmac-meson8b Ethernet RX delay configuration | expand |
On Wed, Apr 29, 2020 at 10:16:40PM +0200, Martin Blumenstingl wrote: > The timing adjustment clock will need similar logic as the RGMII clock: > It has to be enabled in the driver conditionally and when the driver is > unloaded it should be disabled again. Extract the existing code for the > RGMII clock into a new function so it can be re-used. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 23 +++++++++++++++---- > 1 file changed, 18 insertions(+), 5 deletions(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c > index 41f3ef6bea66..d31f79c455de 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c > @@ -266,6 +266,22 @@ static int meson_axg_set_phy_mode(struct meson8b_dwmac *dwmac) > return 0; > } > > +static int meson8b_devm_clk_prepare_enable(struct meson8b_dwmac *dwmac, > + struct clk *clk) > +{ > + int ret; > + > + ret = clk_prepare_enable(clk); > + if (ret) > + return ret; > + > + devm_add_action_or_reset(dwmac->dev, > + (void(*)(void *))clk_disable_unprepare, > + dwmac->rgmii_tx_clk); > + > + return 0; > +} I'm surprised this does not exist in the core. It looks like there was some discussion about this, but nothing merged. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c index 41f3ef6bea66..d31f79c455de 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-meson8b.c @@ -266,6 +266,22 @@ static int meson_axg_set_phy_mode(struct meson8b_dwmac *dwmac) return 0; } +static int meson8b_devm_clk_prepare_enable(struct meson8b_dwmac *dwmac, + struct clk *clk) +{ + int ret; + + ret = clk_prepare_enable(clk); + if (ret) + return ret; + + devm_add_action_or_reset(dwmac->dev, + (void(*)(void *))clk_disable_unprepare, + dwmac->rgmii_tx_clk); + + return 0; +} + static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac) { int ret; @@ -299,16 +315,13 @@ static int meson8b_init_prg_eth(struct meson8b_dwmac *dwmac) return ret; } - ret = clk_prepare_enable(dwmac->rgmii_tx_clk); + ret = meson8b_devm_clk_prepare_enable(dwmac, + dwmac->rgmii_tx_clk); if (ret) { dev_err(dwmac->dev, "failed to enable the RGMII TX clock\n"); return ret; } - - devm_add_action_or_reset(dwmac->dev, - (void(*)(void *))clk_disable_unprepare, - dwmac->rgmii_tx_clk); break; case PHY_INTERFACE_MODE_RMII:
The timing adjustment clock will need similar logic as the RGMII clock: It has to be enabled in the driver conditionally and when the driver is unloaded it should be disabled again. Extract the existing code for the RGMII clock into a new function so it can be re-used. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- .../ethernet/stmicro/stmmac/dwmac-meson8b.c | 23 +++++++++++++++---- 1 file changed, 18 insertions(+), 5 deletions(-)