| Message ID | 20200620163654.37207-2-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 73106f75bf9498ff5d50f1052ad3cf03730d806d |
| Headers | show |
| Series | ARM: dts: use the SDHC MMC controller for eMMC | expand |
Hi Martin, On Sat, 20 Jun 2020 at 22:07, Martin Blumenstingl <martin.blumenstingl@googlemail.com> wrote: > > Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller > IP which typically connects to an eMMC chip (because unlike the SDIO > controller the SDHC controller has an 8-bit bus interface). > > On Meson8, Meson8b and Meson8m2 the clock inputs are all the same. > However, Meson8m2 seems to have an improved version of the SHDC > controller IP which doesn't require the driver to wait manually for a > flush of a DMA transfer. Thus every SoC has it's own compatible string > so if more difference are discovered they can be implemented. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Please add my Reviewed-by: Anand Moon <linux.amoon@gmail.com> -Anand > --- > arch/arm/boot/dts/meson.dtsi | 7 +++++++ > arch/arm/boot/dts/meson8.dtsi | 19 +++++++++++++++++++ > arch/arm/boot/dts/meson8b.dtsi | 20 ++++++++++++++++++++ > arch/arm/boot/dts/meson8m2.dtsi | 4 ++++ > 4 files changed, 50 insertions(+) > > diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi > index ae89deaa8c9c..464057989572 100644 > --- a/arch/arm/boot/dts/meson.dtsi > +++ b/arch/arm/boot/dts/meson.dtsi > @@ -140,6 +140,13 @@ spifc: spi@8c80 { > status = "disabled"; > }; > > + sdhc: mmc@8e00 { > + compatible = "amlogic,meson-mx-sdhc"; > + reg = <0x8e00 0x42>; > + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; > + status = "disabled"; > + }; > + > gpio_intc: interrupt-controller@9880 { > compatible = "amlogic,meson-gpio-intc"; > reg = <0x9880 0x10>; > diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi > index 3d0ab2ac5332..04688e8abce2 100644 > --- a/arch/arm/boot/dts/meson8.dtsi > +++ b/arch/arm/boot/dts/meson8.dtsi > @@ -384,6 +384,15 @@ mux { > }; > }; > > + sdxc_b_pins: sdxc-b { > + mux { > + groups = "sdxc_d0_b", "sdxc_d13_b", > + "sdxc_clk_b", "sdxc_cmd_b"; > + function = "sdxc_b"; > + bias-pull-up; > + }; > + }; > + > spi_nor_pins: nor { > mux { > groups = "nor_d", "nor_q", "nor_c", "nor_cs"; > @@ -558,6 +567,16 @@ &saradc { > nvmem-cell-names = "temperature_calib"; > }; > > +&sdhc { > + compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc"; > + clocks = <&xtal>, > + <&clkc CLKID_FCLK_DIV4>, > + <&clkc CLKID_FCLK_DIV3>, > + <&clkc CLKID_FCLK_DIV5>, > + <&clkc CLKID_SDHC>; > + clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; > +}; > + > &sdio { > compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio"; > clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>; > diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi > index 2069c57343e5..2401cdf5f751 100644 > --- a/arch/arm/boot/dts/meson8b.dtsi > +++ b/arch/arm/boot/dts/meson8b.dtsi > @@ -363,6 +363,16 @@ mux { > }; > }; > > + sdxc_c_pins: sdxc-c { > + mux { > + groups = "sdxc_d0_c", "sdxc_d13_c", > + "sdxc_d47_c", "sdxc_clk_c", > + "sdxc_cmd_c"; > + function = "sdxc_c"; > + bias-pull-up; > + }; > + }; > + > pwm_c1_pins: pwm-c1 { > mux { > groups = "pwm_c1"; > @@ -554,6 +564,16 @@ &saradc { > nvmem-cell-names = "temperature_calib"; > }; > > +&sdhc { > + compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc"; > + clocks = <&xtal>, > + <&clkc CLKID_FCLK_DIV4>, > + <&clkc CLKID_FCLK_DIV3>, > + <&clkc CLKID_FCLK_DIV5>, > + <&clkc CLKID_SDHC>; > + clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; > +}; > + > &sdio { > compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio"; > clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>; > diff --git a/arch/arm/boot/dts/meson8m2.dtsi b/arch/arm/boot/dts/meson8m2.dtsi > index c7ddbb210366..6725dd9fd825 100644 > --- a/arch/arm/boot/dts/meson8m2.dtsi > +++ b/arch/arm/boot/dts/meson8m2.dtsi > @@ -84,6 +84,10 @@ &saradc { > compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc"; > }; > > +&sdhc { > + compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc"; > +}; > + > &usb0_phy { > compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy"; > }; > -- > 2.27.0 > > > _______________________________________________ > linux-amlogic mailing list > linux-amlogic@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-amlogic
diff --git a/arch/arm/boot/dts/meson.dtsi b/arch/arm/boot/dts/meson.dtsi index ae89deaa8c9c..464057989572 100644 --- a/arch/arm/boot/dts/meson.dtsi +++ b/arch/arm/boot/dts/meson.dtsi @@ -140,6 +140,13 @@ spifc: spi@8c80 { status = "disabled"; }; + sdhc: mmc@8e00 { + compatible = "amlogic,meson-mx-sdhc"; + reg = <0x8e00 0x42>; + interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + gpio_intc: interrupt-controller@9880 { compatible = "amlogic,meson-gpio-intc"; reg = <0x9880 0x10>; diff --git a/arch/arm/boot/dts/meson8.dtsi b/arch/arm/boot/dts/meson8.dtsi index 3d0ab2ac5332..04688e8abce2 100644 --- a/arch/arm/boot/dts/meson8.dtsi +++ b/arch/arm/boot/dts/meson8.dtsi @@ -384,6 +384,15 @@ mux { }; }; + sdxc_b_pins: sdxc-b { + mux { + groups = "sdxc_d0_b", "sdxc_d13_b", + "sdxc_clk_b", "sdxc_cmd_b"; + function = "sdxc_b"; + bias-pull-up; + }; + }; + spi_nor_pins: nor { mux { groups = "nor_d", "nor_q", "nor_c", "nor_cs"; @@ -558,6 +567,16 @@ &saradc { nvmem-cell-names = "temperature_calib"; }; +&sdhc { + compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc"; + clocks = <&xtal>, + <&clkc CLKID_FCLK_DIV4>, + <&clkc CLKID_FCLK_DIV3>, + <&clkc CLKID_FCLK_DIV5>, + <&clkc CLKID_SDHC>; + clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; +}; + &sdio { compatible = "amlogic,meson8-sdio", "amlogic,meson-mx-sdio"; clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>; diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index 2069c57343e5..2401cdf5f751 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -363,6 +363,16 @@ mux { }; }; + sdxc_c_pins: sdxc-c { + mux { + groups = "sdxc_d0_c", "sdxc_d13_c", + "sdxc_d47_c", "sdxc_clk_c", + "sdxc_cmd_c"; + function = "sdxc_c"; + bias-pull-up; + }; + }; + pwm_c1_pins: pwm-c1 { mux { groups = "pwm_c1"; @@ -554,6 +564,16 @@ &saradc { nvmem-cell-names = "temperature_calib"; }; +&sdhc { + compatible = "amlogic,meson8-sdhc", "amlogic,meson-mx-sdhc"; + clocks = <&xtal>, + <&clkc CLKID_FCLK_DIV4>, + <&clkc CLKID_FCLK_DIV3>, + <&clkc CLKID_FCLK_DIV5>, + <&clkc CLKID_SDHC>; + clock-names = "clkin0", "clkin1", "clkin2", "clkin3", "pclk"; +}; + &sdio { compatible = "amlogic,meson8b-sdio", "amlogic,meson-mx-sdio"; clocks = <&clkc CLKID_SDIO>, <&clkc CLKID_CLK81>; diff --git a/arch/arm/boot/dts/meson8m2.dtsi b/arch/arm/boot/dts/meson8m2.dtsi index c7ddbb210366..6725dd9fd825 100644 --- a/arch/arm/boot/dts/meson8m2.dtsi +++ b/arch/arm/boot/dts/meson8m2.dtsi @@ -84,6 +84,10 @@ &saradc { compatible = "amlogic,meson8m2-saradc", "amlogic,meson-saradc"; }; +&sdhc { + compatible = "amlogic,meson8m2-sdhc", "amlogic,meson-mx-sdhc"; +}; + &usb0_phy { compatible = "amlogic,meson8m2-usb2-phy", "amlogic,meson-mx-usb2-phy"; };
Meson6, Meson8, Meson8b and Meson8m2 are using a similar SDHC controller IP which typically connects to an eMMC chip (because unlike the SDIO controller the SDHC controller has an 8-bit bus interface). On Meson8, Meson8b and Meson8m2 the clock inputs are all the same. However, Meson8m2 seems to have an improved version of the SHDC controller IP which doesn't require the driver to wait manually for a flush of a DMA transfer. Thus every SoC has it's own compatible string so if more difference are discovered they can be implemented. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm/boot/dts/meson.dtsi | 7 +++++++ arch/arm/boot/dts/meson8.dtsi | 19 +++++++++++++++++++ arch/arm/boot/dts/meson8b.dtsi | 20 ++++++++++++++++++++ arch/arm/boot/dts/meson8m2.dtsi | 4 ++++ 4 files changed, 50 insertions(+)