| Message ID | 20201124121740.25704-1-christianshewitt@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: meson: Add capacity-dmips-mhz attributes to GXM | expand |
On 24/11/2020 13:17, Christian Hewitt wrote: > GXM (S912) is a big-little design with CPUs 0-3 clocked at 1.5GHz > and CPUs 4-7 at 1.0GHz. Adding capacity-dmips-mhz attributes allows > the scheduler to factor the different clock speeds into capacity > calculations and prefer the higher-clocked cluster to improve > overall performance. > > This was inspired by the similar change for G12B [0] boards. The > diference here is that all cores are A53's so the same dmips-mhz > value is used. > > VIM2:~ # cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq > 1512000 > 1512000 > 1512000 > 1512000 > 1000000 > 1000000 > 1000000 > 1000000 > > before: > > VIM2:~ # cat /sys/devices/system/cpu/cpu*/cpu_capacity > 1024 > 1024 > 1024 > 1024 > 1024 > 1024 > 1024 > 1024 > > after: > > VIM2:~ # cat /sys/devices/system/cpu/cpu*/cpu_capacity > 1024 > 1024 > 1024 > 1024 > 677 > 677 > 677 > 677 > > The after value matches my table-napkin calculation: > > (1000000 / 1512000 = 0.661) * 1024 = 677 > > [0] https://github.com/torvalds/linux/commit/6eeaf4d2452ec8b1ece58776812140734fc2e088 > > Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> > --- > arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi > index fe4145112295..411cc312fc62 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi > @@ -42,11 +42,28 @@ > }; > }; > > + cpu0: cpu@0 { > + capacity-dmips-mhz = <1024>; > + }; > + > + cpu1: cpu@1 { > + capacity-dmips-mhz = <1024>; > + }; > + > + cpu2: cpu@2 { > + capacity-dmips-mhz = <1024>; > + }; > + > + cpu3: cpu@3 { > + capacity-dmips-mhz = <1024>; > + }; > + > cpu4: cpu@100 { > device_type = "cpu"; > compatible = "arm,cortex-a53"; > reg = <0x0 0x100>; > enable-method = "psci"; > + capacity-dmips-mhz = <1024>; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 1>; > #cooling-cells = <2>; > @@ -57,6 +74,7 @@ > compatible = "arm,cortex-a53"; > reg = <0x0 0x101>; > enable-method = "psci"; > + capacity-dmips-mhz = <1024>; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 1>; > #cooling-cells = <2>; > @@ -67,6 +85,7 @@ > compatible = "arm,cortex-a53"; > reg = <0x0 0x102>; > enable-method = "psci"; > + capacity-dmips-mhz = <1024>; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 1>; > #cooling-cells = <2>; > @@ -77,6 +96,7 @@ > compatible = "arm,cortex-a53"; > reg = <0x0 0x103>; > enable-method = "psci"; > + capacity-dmips-mhz = <1024>; > next-level-cache = <&l2>; > clocks = <&scpi_dvfs 1>; > #cooling-cells = <2>; > Re-reading the bindings, the value is correct and necessary to have the cpu_capacity calculated to help the scheduler. Thanks! Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi index fe4145112295..411cc312fc62 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi @@ -42,11 +42,28 @@ }; }; + cpu0: cpu@0 { + capacity-dmips-mhz = <1024>; + }; + + cpu1: cpu@1 { + capacity-dmips-mhz = <1024>; + }; + + cpu2: cpu@2 { + capacity-dmips-mhz = <1024>; + }; + + cpu3: cpu@3 { + capacity-dmips-mhz = <1024>; + }; + cpu4: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x100>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; #cooling-cells = <2>; @@ -57,6 +74,7 @@ compatible = "arm,cortex-a53"; reg = <0x0 0x101>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; #cooling-cells = <2>; @@ -67,6 +85,7 @@ compatible = "arm,cortex-a53"; reg = <0x0 0x102>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; #cooling-cells = <2>; @@ -77,6 +96,7 @@ compatible = "arm,cortex-a53"; reg = <0x0 0x103>; enable-method = "psci"; + capacity-dmips-mhz = <1024>; next-level-cache = <&l2>; clocks = <&scpi_dvfs 1>; #cooling-cells = <2>;
GXM (S912) is a big-little design with CPUs 0-3 clocked at 1.5GHz and CPUs 4-7 at 1.0GHz. Adding capacity-dmips-mhz attributes allows the scheduler to factor the different clock speeds into capacity calculations and prefer the higher-clocked cluster to improve overall performance. This was inspired by the similar change for G12B [0] boards. The diference here is that all cores are A53's so the same dmips-mhz value is used. VIM2:~ # cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq 1512000 1512000 1512000 1512000 1000000 1000000 1000000 1000000 before: VIM2:~ # cat /sys/devices/system/cpu/cpu*/cpu_capacity 1024 1024 1024 1024 1024 1024 1024 1024 after: VIM2:~ # cat /sys/devices/system/cpu/cpu*/cpu_capacity 1024 1024 1024 1024 677 677 677 677 The after value matches my table-napkin calculation: (1000000 / 1512000 = 0.661) * 1024 = 677 [0] https://github.com/torvalds/linux/commit/6eeaf4d2452ec8b1ece58776812140734fc2e088 Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> --- arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+)