| Message ID | 20201230012724.1326156-3-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Amlogic Meson Always-On ARC remote-processor support | expand |
On Wed, 30 Dec 2020 02:27:21 +0100, Martin Blumenstingl wrote: > The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > contains registers for various IP blocks such as pin-controller bits for > the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > The registers can be accessed directly when not running in "secure mode". > When "secure mode" is enabled then these registers have to be accessed > through secure monitor calls. > > So far these SoCs are always known to boot in "non-secure mode". > Add a binding documentation using syscon (as these registers are shared > across different IPs) for the SECBUS2 registers. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > My bot found errors running 'make dt_binding_check' on your patch: yamllint warnings/errors: ./Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml:35:9: [warning] wrong indentation: expected 10 but found 8 (indentation) dtschema/dtc warnings/errors: See https://patchwork.ozlabs.org/patch/1421302 This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit.
On Wed, Dec 30, 2020 at 02:27:21AM +0100, Martin Blumenstingl wrote: > The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > contains registers for various IP blocks such as pin-controller bits for > the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > The registers can be accessed directly when not running in "secure mode". > When "secure mode" is enabled then these registers have to be accessed > through secure monitor calls. > > So far these SoCs are always known to boot in "non-secure mode". > Add a binding documentation using syscon (as these registers are shared > across different IPs) for the SECBUS2 registers. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++ > 1 file changed, 53 insertions(+) > create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > > diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > new file mode 100644 > index 000000000000..cfa8e9de6c28 > --- /dev/null > +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml > @@ -0,0 +1,53 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface > + > +maintainers: > + - Martin Blumenstingl <martin.blumenstingl@googlemail.com> > + > +description: | > + The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which > + contains registers for various IP blocks such as pin-controller bits for > + the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. > + The registers can be accessed directly when not running in "secure mode". > + When "secure mode" is enabled then these registers have to be accessed > + through secure monitor calls. > + > +# We need a select here so we don't match all nodes with 'syscon' No, you don't. The default 'select' will ignore 'syscon' and 'simple-mfd'. > +select: > + properties: > + compatible: > + contains: > + enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + required: > + - compatible > + > +properties: > + compatible: > + items: > + - enum: > + - amlogic,meson8-secbus2 > + - amlogic,meson8b-secbus2 > + - const: syscon > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + secbus2: system-controller@4000 { > + compatible = "amlogic,meson8-secbus2", "syscon"; > + reg = <0x4000 0x2000>; > + }; > -- > 2.30.0 >
diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml new file mode 100644 index 000000000000..cfa8e9de6c28 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-mx-secbus2.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson8/Meson8b/Meson8m2 SECBUS2 register interface + +maintainers: + - Martin Blumenstingl <martin.blumenstingl@googlemail.com> + +description: | + The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which + contains registers for various IP blocks such as pin-controller bits for + the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. + The registers can be accessed directly when not running in "secure mode". + When "secure mode" is enabled then these registers have to be accessed + through secure monitor calls. + +# We need a select here so we don't match all nodes with 'syscon' +select: + properties: + compatible: + contains: + enum: + - amlogic,meson8-secbus2 + - amlogic,meson8b-secbus2 + required: + - compatible + +properties: + compatible: + items: + - enum: + - amlogic,meson8-secbus2 + - amlogic,meson8b-secbus2 + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + secbus2: system-controller@4000 { + compatible = "amlogic,meson8-secbus2", "syscon"; + reg = <0x4000 0x2000>; + };
The Meson8/Meson8b/Meson8m2 SoCs have a register bank called SECBUS2 which contains registers for various IP blocks such as pin-controller bits for the BSD_EN and TEST_N GPIOs as well as some AO ARC core control bits. The registers can be accessed directly when not running in "secure mode". When "secure mode" is enabled then these registers have to be accessed through secure monitor calls. So far these SoCs are always known to boot in "non-secure mode". Add a binding documentation using syscon (as these registers are shared across different IPs) for the SECBUS2 registers. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- .../arm/amlogic/amlogic,meson-mx-secbus2.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-mx-secbus2.yaml