From patchwork Thu Sep 1 02:45:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jiucheng Xu X-Patchwork-Id: 12961682 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE671ECAAD4 for ; Thu, 1 Sep 2022 02:46:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=iYd+AZSWYMdrparSrelOOPK+56o2HvJEO3aMU1caXYs=; b=YzPtgmgW7J2UIN AD65GtGOL6cABwkztOSg7XuKIF1EcbrYyc8/heHR4tphVhtY3B6DLnqLWNqk8RnZxqeOtpc1R+h3j 01bHtGiGdciDWlRVM726YCc8fO6WIE41JhQRhJEY33ZX+WA88QLyL/SaqrYJKZl4AqSRQV7QaK1qu RkL8OMj6WUvuEI+K6y/sHDr4tZNNupoXD6SWkBkqBMuFywjDm8AG7jSd1iOYI+g8yBlsHj4chybLB ATHuGc6EQjVUIUQ7+CQ5A0eFmyyWkkl+ZsisQcovHLcpWBE7w5qVCC9Ug8Vc+Blv7Sb7KI/MGSYqV af10kBk5gbNC08yNzLAg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oTaE6-009FZp-KG; Thu, 01 Sep 2022 02:46:42 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oTaDX-009FIO-UG; Thu, 01 Sep 2022 02:46:09 +0000 Received: from droid01-xa.amlogic.com (10.88.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.9; Thu, 1 Sep 2022 10:45:47 +0800 From: Jiucheng Xu To: , , , CC: Rob Herring , Krzysztof Kozlowski , Will Deacon , Mark Rutland , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl , Chris Healy , Jiucheng Xu Subject: [PATCH v6 4/4] arm64: dts: meson: Add DDR PMU node Date: Thu, 1 Sep 2022 10:45:26 +0800 Message-ID: <20220901024526.2833232-4-jiucheng.xu@amlogic.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220901024526.2833232-1-jiucheng.xu@amlogic.com> References: <20220901024526.2833232-1-jiucheng.xu@amlogic.com> MIME-Version: 1.0 X-Originating-IP: [10.88.11.200] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220831_194607_998894_1455CE5F X-CRM114-Status: UNSURE ( 9.21 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add DDR PMU device node for G12 series SoC Signed-off-by: Jiucheng Xu Reviewed-by: Neil Armstrong --- Changes v6 -> v5: - No change Changes v5 -> v4: - Split reg into two items - Alphabet order location Changes v3 -> v4: - No change Changes v2 -> v3: - No change Changes v1 -> v2: - Remove model, dmc_nr, chann_nr properties - Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as identifier --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++ arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++ arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++ 4 files changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 45947c1031c4..9dbd50820b1c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1705,6 +1705,12 @@ internal_ephy: ethernet_phy@8 { }; }; + pmu: pmu@ff638000 { + reg = <0x0 0xff638000 0x0 0x100>, + <0x0 0xff638c00 0x0 0x100>; + interrupts = ; + }; + aobus: bus@ff800000 { compatible = "simple-bus"; reg = <0x0 0xff800000 0x0 0x100000>; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi index fb0ab27d1f64..0e8b57283f31 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi @@ -133,3 +133,7 @@ map1 { }; }; }; + +&pmu { + compatible = "amlogic,g12a-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi index ee8fcae9f9f0..18791ef51f58 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi @@ -139,3 +139,7 @@ map1 { &mali { dma-coherent; }; + +&pmu { + compatible = "amlogic,g12b-ddr-pmu"; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi index 80737731af3f..c307b34ccd72 100644 --- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi @@ -520,6 +520,10 @@ &pcie { power-domains = <&pwrc PWRC_SM1_PCIE_ID>; }; +&pmu { + compatible = "amlogic,sm1-ddr-pmu"; +}; + &pwrc { compatible = "amlogic,meson-sm1-pwrc"; };