Message ID | 20221107155825.1644604-5-pierre.gondois@arm.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[10.34.100.128]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C7D3F3F534; Mon, 7 Nov 2022 08:09:48 -0800 (PST) From: Pierre Gondois <pierre.gondois@arm.com> To: linux-kernel@vger.kernel.org Cc: Pierre Gondois <pierre.gondois@arm.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Florian Fainelli <f.fainelli@gmail.com>, Broadcom internal kernel review list <bcm-kernel-feedback-list@broadcom.com>, Ray Jui <rjui@broadcom.com>, Scott Branden <sbranden@broadcom.com>, Tsahee Zidenberg <tsahee@annapurnalabs.com>, Antoine Tenart <atenart@kernel.org>, Brijesh Singh <brijeshkumar.singh@amd.com>, Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>, Tom Lendacky <thomas.lendacky@amd.com>, Neil Armstrong <neil.armstrong@linaro.org>, Kevin Hilman <khilman@baylibre.com>, Jerome Brunet <jbrunet@baylibre.com>, Martin Blumenstingl <martin.blumenstingl@googlemail.com>, Khuong Dinh <khuong@os.amperecomputing.com>, Liviu Dudau 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<diogo.ivo@tecnico.ulisboa.pt>, Vidya Sagar <vidyas@nvidia.com>, Ashish Mhetre <amhetre@nvidia.com>, Johan Jonker <jbx6244@gmail.com>, Christopher Obbard <chris.obbard@collabora.com>, Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>, Aswani Reddy <aswani.reddy@samsung.com>, Shashank Prashar <s.prashar@samsung.com>, Ajay Kumar <ajaykumar.rs@samsung.com>, devicetree@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-tegra@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-realtek-soc@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org Subject: [PATCH v2 04/23] arm64: dts: Update cache properties for apm Date: Mon, 7 Nov 2022 16:56:57 +0100 Message-Id: <20221107155825.1644604-5-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: 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X-Mailman-Approved-At: Mon, 07 Nov 2022 09:28:32 -0800 X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: <linux-amlogic.lists.infradead.org> List-Unsubscribe: <http://lists.infradead.org/mailman/options/linux-amlogic>, <mailto:linux-amlogic-request@lists.infradead.org?subject=unsubscribe> List-Archive: <http://lists.infradead.org/pipermail/linux-amlogic/> List-Post: <mailto:linux-amlogic@lists.infradead.org> List-Help: <mailto:linux-amlogic-request@lists.infradead.org?subject=help> List-Subscribe: <http://lists.infradead.org/mailman/listinfo/linux-amlogic>, <mailto:linux-amlogic-request@lists.infradead.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" <linux-amlogic-bounces@lists.infradead.org> Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org |
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Update cache properties for arm64 DTS
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diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi index a8526f8157ec..68ba865fcd58 100644 --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi @@ -97,15 +97,19 @@ cpu@301 { }; xgene_L2_0: l2-cache-0 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_1: l2-cache-1 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_2: l2-cache-2 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_3: l2-cache-3 { compatible = "cache"; + cache-level = <2>; }; }; diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi index f56d687f772d..9ac7417f65eb 100644 --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi @@ -81,15 +81,19 @@ cpu@301 { }; xgene_L2_0: l2-cache-0 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_1: l2-cache-1 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_2: l2-cache-2 { compatible = "cache"; + cache-level = <2>; }; xgene_L2_3: l2-cache-3 { compatible = "cache"; + cache-level = <2>; }; };
The DeviceTree Specification v0.3 specifies that the cache node 'compatible' and 'cache-level' properties are 'required'. Cf. s3.8 Multi-level and Shared Cache Nodes The 'cache-unified' property should be present if one of the properties for unified cache is present ('cache-size', ...). Update the Device Trees accordingly. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> --- arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 4 ++++ arch/arm64/boot/dts/apm/apm-storm.dtsi | 4 ++++ 2 files changed, 8 insertions(+)