From patchwork Wed May 10 09:11:29 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xianwei Zhao X-Patchwork-Id: 13236676 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0C2D8C7EE22 for ; Wed, 10 May 2023 09:12:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=oudOLIpx7UAGo76HGsOgrH6P9m23grwqY9DoCRl7pMY=; b=HD3sqpd9PIFCHo hESCgWxZ8asB357dx7VfL26gvjB0RtlappNtqfj+xizvOSPXJ8YMbwvfdCSs+pT/ttxX2l0qyB3kk xvLFwk8UUt68UwQvHWJV/rMnlzICwUWwmHviIPy6WbVlXdhR+XCFlN8bqgj+9uoJKe8lq7jYBUYEt NdSuA6ZV8sC24Mm2Vy28BBWMCGG5U/4Seq3DD6XdtmIZJl7Lc4XYnPATSzJYdjC/JqZRDdyLLSiE8 DAquFqRCwllZls7z1K53JxEKgfj7RErJ3UC1cFagGiEzP45tv2aEYwLbQddb66shSmc7E+R9mqNo7 W6yo1lT6t8FtvVdN7Xww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pwfrT-005cfZ-1J; Wed, 10 May 2023 09:11:51 +0000 Received: from mail-sh.amlogic.com ([58.32.228.43]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pwfrL-005cdm-1G; Wed, 10 May 2023 09:11:45 +0000 Received: from droid01-cd.amlogic.com (10.98.11.200) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server id 15.1.2507.13; Wed, 10 May 2023 17:11:25 +0800 From: Xianwei Zhao To: , , , CC: Catalin Marinas , Will Deacon , Neil Armstrong , Kevin Hilman , Rob Herring , Krzysztof Kozlowski , Xianwei Zhao Subject: [PATCH V4] arm64: dts: add support for C3 based Amlogic AW409 Date: Wed, 10 May 2023 17:11:29 +0800 Message-ID: <20230510091129.151669-1-xianwei.zhao@amlogic.com> X-Mailer: git-send-email 2.37.1 MIME-Version: 1.0 X-Originating-IP: [10.98.11.200] X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230510_021143_455743_4C94B088 X-CRM114-Status: GOOD ( 13.36 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Amlogic C3 is an advanced edge AI processor designed for smart IP camera applications. Add basic support for the C3 based Amlogic AW409 board, which describes the following components: CPU, GIC, IRQ, Timer, UART. It's capable of booting up into the serial console. Signed-off-by: Xianwei Zhao Reviewed-by: Neil Armstrong --- Link: https://lore.kernel.org/all/20230407102704.1055152-1-kelvin.zhang@amlogic.com Link: https://lore.kernel.org/all/20230307222651.2106615-2-martin.blumenstingl@googlemail.com V3 -> V4: Move Link under the --- before the changelog. V2 -> V3: Remove '256m' from filename; Keep alphabetical order of Makefile. V1 -> V2: Remove new arch, and use ARCH_MESON; Modify node name, and delete superfluous blank line. --- arch/arm64/boot/dts/amlogic/Makefile | 1 + .../dts/amlogic/amlogic-c3-c302x-aw409.dts | 29 +++++++ arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi | 86 +++++++++++++++++++ 3 files changed, 116 insertions(+) create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts create mode 100644 arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi base-commit: ae68fb187b59bc8645974320808ab2d7c41b1833 diff --git a/arch/arm64/boot/dts/amlogic/Makefile b/arch/arm64/boot/dts/amlogic/Makefile index cd1c5b04890a..6f61798a109f 100644 --- a/arch/arm64/boot/dts/amlogic/Makefile +++ b/arch/arm64/boot/dts/amlogic/Makefile @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_MESON) += amlogic-c3-c302x-aw409.dtb dtb-$(CONFIG_ARCH_MESON) += meson-a1-ad401.dtb dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j100.dtb dtb-$(CONFIG_ARCH_MESON) += meson-axg-jethome-jethub-j110-rev-2.dtb diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts new file mode 100644 index 000000000000..edce8850b338 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3-c302x-aw409.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "amlogic-c3.dtsi" + +/ { + model = "Amlogic C302 aw409 Development Board"; + compatible = "amlogic,aw409", "amlogic,c3"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + aliases { + serial0 = &uart_b; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x10000000>; + }; +}; + +&uart_b { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi new file mode 100644 index 000000000000..93b335aef605 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/amlogic-c3.dtsi @@ -0,0 +1,86 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2021 Amlogic, Inc. All rights reserved. + */ + +#include +#include +#include + +/ { + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x0>; + enable-method = "psci"; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a35"; + reg = <0x0 0x1>; + enable-method = "psci"; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + + xtal: xtal-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xtal"; + #clock-cells = <0>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@fff01000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xfff01000 0 0x1000>, + <0x0 0xfff02000 0 0x2000>, + <0x0 0xfff04000 0 0x2000>, + <0x0 0xfff06000 0 0x2000>; + interrupts = ; + }; + + apb4: bus@fe000000 { + compatible = "simple-bus"; + reg = <0x0 0xfe000000 0x0 0x480000>; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x480000>; + + uart_b: serial@7a000 { + compatible = "amlogic,meson-g12a-uart"; + reg = <0x0 0x7a000 0x0 0x18>; + interrupts = ; + status = "disabled"; + clocks = <&xtal>, <&xtal>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + }; + + }; + }; +};