@@ -83,14 +83,14 @@ i2c_A: i2c@8500 {
};
pwm_ab: pwm@8550 {
- compatible = "amlogic,meson-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x8550 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
- compatible = "amlogic,meson-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x8650 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -450,10 +450,14 @@ analog_top: analog-top@81a8 {
};
pwm_ef: pwm@86c0 {
- compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x86c0 0x10>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
clock-measure@8758 {
@@ -702,11 +706,17 @@ timer@600 {
};
&pwm_ab {
- compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
&pwm_cd {
- compatible = "amlogic,meson8-pwm", "amlogic,meson8b-pwm";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
&rtc {
@@ -441,8 +441,6 @@ &pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
pinctrl-names = "default";
- clocks = <&xtal>, <&xtal>;
- clock-names = "clkin0", "clkin1";
};
&rtc {
@@ -162,8 +162,6 @@ &pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
pinctrl-names = "default";
- clocks = <&xtal>, <&xtal>;
- clock-names = "clkin0", "clkin1";
};
&uart_AO {
@@ -347,8 +347,6 @@ &pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_c1_pins>, <&pwm_d_pins>;
pinctrl-names = "default";
- clocks = <&xtal>, <&xtal>;
- clock-names = "clkin0", "clkin1";
};
&rtc {
@@ -404,10 +404,14 @@ analog_top: analog-top@81a8 {
};
pwm_ef: pwm@86c0 {
- compatible = "amlogic,meson8b-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x86c0 0x10>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
clock-measure@8758 {
@@ -677,11 +681,17 @@ timer@600 {
};
&pwm_ab {
- compatible = "amlogic,meson8b-pwm";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
&pwm_cd {
- compatible = "amlogic,meson8b-pwm";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
&rtc {
Update Amlogic based SoC PWMs to meson8-pwm-v2 compatible Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- arch/arm/boot/dts/amlogic/meson.dtsi | 4 ++-- arch/arm/boot/dts/amlogic/meson8.dtsi | 16 +++++++++++++--- arch/arm/boot/dts/amlogic/meson8b-ec100.dts | 2 -- arch/arm/boot/dts/amlogic/meson8b-mxq.dts | 2 -- arch/arm/boot/dts/amlogic/meson8b-odroidc1.dts | 2 -- arch/arm/boot/dts/amlogic/meson8b.dtsi | 16 +++++++++++++--- 6 files changed, 28 insertions(+), 14 deletions(-)