@@ -1664,10 +1664,14 @@ sec_AO: ao-secure@140 {
};
pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-axg-ao-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x02000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
};
uart_AO: serial@3000 {
@@ -1699,10 +1703,14 @@ i2c_AO: i2c@5000 {
};
pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-axg-ao-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x07000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
};
ir: ir@8000 {
@@ -1777,17 +1785,25 @@ watchdog@f0d0 {
};
pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-axg-ee-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x1b000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-axg-ee-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x1a000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <&clkc CLKID_FCLK_DIV5>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
spicc0: spi@13000 {
@@ -2039,10 +2039,12 @@ cecb_AO: cec@280 {
};
pwm_AO_cd: pwm@2000 {
- compatible = "amlogic,meson-g12a-ao-pwm-cd";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x2000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>;
};
uart_AO: serial@3000 {
@@ -2078,10 +2080,14 @@ i2c_AO: i2c@5000 {
};
pwm_AO_ab: pwm@7000 {
- compatible = "amlogic,meson-g12a-ao-pwm-ab";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x7000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <&clkc_AO CLKID_AO_CLK81>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV5>;
};
ir: ir@8000 {
@@ -2229,24 +2235,36 @@ spifc: spi@14000 {
};
pwm_ef: pwm@19000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x19000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
pwm_cd: pwm@1a000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x1a000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
pwm_ab: pwm@1b000 {
- compatible = "amlogic,meson-g12a-ee-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x1b000 0x0 0x20>;
#pwm-cells = <3>;
status = "disabled";
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
};
i2c3: i2c@1c000 {
@@ -280,8 +280,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -289,8 +287,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&saradc {
@@ -386,8 +386,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -395,8 +393,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pdm {
@@ -498,8 +498,6 @@ &i2c3 {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -325,8 +325,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -360,8 +358,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&uart_A {
@@ -116,6 +116,4 @@ &cpu103 {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>, <&pwm_b_x7_pins>;
- clocks = <&xtal>, <&xtal>;
- clock-names = "clkin0", "clkin1";
};
@@ -257,25 +257,18 @@ &pcie {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
-
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
-
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
-
status = "okay";
};
@@ -370,8 +370,6 @@ &pwm_ab {
status = "okay";
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pwm_cd {
@@ -390,8 +388,6 @@ &pwm_ef {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -92,16 +92,12 @@ &cpu103 {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -327,16 +327,12 @@ hdmi_tx_tmds_out: endpoint {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -351,32 +351,24 @@ &ir {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -304,24 +304,18 @@ &ir {
&pwm_ab {
pinctrl-0 = <&pwm_a_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
status = "okay";
};
@@ -341,24 +341,18 @@ rtc: rtc@51 {
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_3_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_ab {
pinctrl-0 = <&pwm_b_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
status = "okay";
};
@@ -237,8 +237,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
@@ -329,14 +329,14 @@ i2c_A: i2c@8500 {
};
pwm_ab: pwm@8550 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x08550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
};
pwm_cd: pwm@8650 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x08650 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -351,7 +351,7 @@ saradc: adc@8680 {
};
pwm_ef: pwm@86c0 {
- compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x086c0 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -498,7 +498,7 @@ i2c_AO: i2c@500 {
};
pwm_AO_ab: pwm@550 {
- compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
+ compatible = "amlogic,meson8-pwm-v2";
reg = <0x0 0x00550 0x0 0x10>;
#pwm-cells = <3>;
status = "disabled";
@@ -294,8 +294,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
@@ -237,8 +237,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
@@ -150,8 +150,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
@@ -219,8 +219,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
@@ -185,8 +185,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
@@ -733,6 +733,32 @@ mux {
};
};
+&pwm_ab {
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_cd {
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_ef {
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_AO_ab {
+ clocks = <&xtal>,
+ <&clkc CLKID_CLK81>;
+};
+
&pwrc {
resets = <&reset RESET_VIU>,
<&reset RESET_VENC>,
@@ -276,8 +276,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* This is connected to the Bluetooth module: */
@@ -116,8 +116,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
@@ -115,8 +115,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* SD card */
@@ -207,8 +207,6 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
- clocks = <&xtal> , <&xtal>;
- clock-names = "clkin0", "clkin1" ;
};
&pwm_ef {
@@ -145,8 +145,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
@@ -101,8 +101,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&saradc {
@@ -803,6 +803,32 @@ internal_phy: ethernet-phy@8 {
};
};
+&pwm_ab {
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_cd {
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_ef {
+ clocks = <&xtal>,
+ <0>,
+ <&clkc CLKID_FCLK_DIV4>,
+ <&clkc CLKID_FCLK_DIV3>;
+};
+
+&pwm_AO_ab {
+ clocks = <&xtal>,
+ <&clkc CLKID_CLK81>;
+};
+
&pwrc {
resets = <&reset RESET_VIU>,
<&reset RESET_VENC>,
@@ -285,16 +285,12 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_3_pins>, <&pwm_ao_b_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
&sd_emmc_a {
@@ -189,8 +189,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&clkc CLKID_FCLK_DIV4>;
- clock-names = "clkin0";
};
/* Wireless SDIO Module */
@@ -454,24 +454,18 @@ &pwm_AO_cd {
status = "okay";
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
};
&pwm_ab {
status = "okay";
pinctrl-0 = <&pwm_b_x7_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
};
&pwm_cd {
status = "okay";
pinctrl-0 = <&pwm_d_x3_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
};
&saradc {
@@ -199,24 +199,18 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
- clock-names = "clkin1";
- status = "okay";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&saradc {
@@ -78,8 +78,6 @@ &cpu3 {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -388,8 +388,6 @@ &ir {
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -432,15 +432,11 @@ &pwm_AO_ab {
status = "okay";
pinctrl-0 = <&pwm_ao_a_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin1";
status = "okay";
};
@@ -448,8 +444,6 @@ &pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
pinctrl-names = "default";
- clocks = <&xtal>;
- clock-names = "clkin0";
};
&saradc {
Update Amlogic based SoC PWMs to meson8-pwm-v2 compatible Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 24 +++++++++++++--- .../boot/dts/amlogic/meson-g12-common.dtsi | 28 +++++++++++++++---- .../dts/amlogic/meson-g12a-radxa-zero.dts | 4 --- .../boot/dts/amlogic/meson-g12a-sei510.dts | 4 --- .../boot/dts/amlogic/meson-g12a-u200.dts | 2 -- .../boot/dts/amlogic/meson-g12a-x96-max.dts | 4 --- .../amlogic/meson-g12b-a311d-libretech-cc.dts | 2 -- .../dts/amlogic/meson-g12b-bananapi-cm4.dtsi | 7 ----- .../boot/dts/amlogic/meson-g12b-bananapi.dtsi | 4 --- .../dts/amlogic/meson-g12b-khadas-vim3.dtsi | 4 --- .../boot/dts/amlogic/meson-g12b-odroid.dtsi | 4 --- .../dts/amlogic/meson-g12b-radxa-zero2.dts | 8 ------ .../boot/dts/amlogic/meson-g12b-w400.dtsi | 6 ---- .../dts/amlogic/meson-gx-libretech-pc.dtsi | 6 ---- .../boot/dts/amlogic/meson-gx-p23x-q20x.dtsi | 2 -- arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8 +++--- .../boot/dts/amlogic/meson-gxbb-nanopi-k2.dts | 2 -- .../dts/amlogic/meson-gxbb-nexbox-a95x.dts | 2 -- .../boot/dts/amlogic/meson-gxbb-p20x.dtsi | 2 -- .../boot/dts/amlogic/meson-gxbb-vega-s95.dtsi | 2 -- .../boot/dts/amlogic/meson-gxbb-wetek.dtsi | 2 -- arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 26 +++++++++++++++++ .../boot/dts/amlogic/meson-gxl-s805x-p241.dts | 2 -- .../meson-gxl-s905w-jethome-jethub-j80.dts | 2 -- .../meson-gxl-s905x-hwacom-amazetv.dts | 2 -- .../amlogic/meson-gxl-s905x-khadas-vim.dts | 2 -- .../amlogic/meson-gxl-s905x-nexbox-a95x.dts | 2 -- .../dts/amlogic/meson-gxl-s905x-p212.dtsi | 2 -- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 26 +++++++++++++++++ .../dts/amlogic/meson-gxm-khadas-vim2.dts | 4 --- .../boot/dts/amlogic/meson-gxm-rbox-pro.dts | 2 -- .../amlogic/meson-libretech-cottonwood.dtsi | 6 ---- .../boot/dts/amlogic/meson-sm1-ac2xx.dtsi | 6 ---- .../dts/amlogic/meson-sm1-khadas-vim3l.dts | 2 -- .../boot/dts/amlogic/meson-sm1-odroid.dtsi | 2 -- .../boot/dts/amlogic/meson-sm1-sei610.dts | 6 ---- 36 files changed, 99 insertions(+), 120 deletions(-)