| Message ID | 20240329210453.27530-4-ddrokosov@salutedevices.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v1,1/4] arm64: dts: amlogic: a1: add new syspll_in input for clkc_pll controller | expand |
diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 07fd0be828d4..0de809f4d42c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -747,10 +747,12 @@ clkc_periphs: clock-controller@800 { <&clkc_pll CLKID_FCLK_DIV5>, <&clkc_pll CLKID_FCLK_DIV7>, <&clkc_pll CLKID_HIFI_PLL>, + <&clkc_pll CLKID_SYS_PLL_DIV16>, <&xtal>; clock-names = "fclk_div2", "fclk_div3", "fclk_div5", "fclk_div7", - "hifi_pll", "xtal"; + "hifi_pll", "sys_pll_div16", + "xtal"; }; i2c0: i2c@1400 {
The input clock 'sys_pll_div16' is a clock with a fixed ratio inherited from the main system PLL. Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)