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Wed, 15 May 2024 21:51:16 +0300 From: Dmitry Rokosov To: , , , , , , , CC: , , , , , , , , Dmitry Rokosov , Rob Herring Subject: [PATCH v3 6/7] dt-bindings: clock: meson: add A1 CPU clock controller bindings Date: Wed, 15 May 2024 21:47:29 +0300 Message-ID: <20240515185103.20256-7-ddrokosov@salutedevices.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240515185103.20256-1-ddrokosov@salutedevices.com> References: <20240515185103.20256-1-ddrokosov@salutedevices.com> MIME-Version: 1.0 X-Originating-IP: [100.64.160.123] X-ClientProxiedBy: p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185260 [May 15 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: ddrokosov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_uf_ne_domains}, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2;100.64.160.123:7.1.2;devicetree.org:7.1.1;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;smtp.sberdevices.ru:5.0.1,7.1.1;salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean, bases: 2024/05/15 12:35:00 X-KSMG-LinksScanning: Clean, bases: 2024/05/15 12:57:00 X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/05/15 13:12:00 #25231738 X-KSMG-AntiVirus-Status: Clean, skipped X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240515_115125_187780_CEDB60D2 X-CRM114-Status: GOOD ( 14.64 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Add the documentation and dt bindings for Amlogic A1 CPU clock controller. This controller consists of the general 'cpu_clk' and two main parents: 'cpu fixed clock' and 'syspll'. The 'cpu fixed clock' is an internal fixed clock, while the 'syspll' serves as an external input from the A1 PLL clock controller. Signed-off-by: Dmitry Rokosov Reviewed-by: Rob Herring --- .../bindings/clock/amlogic,a1-cpu-clkc.yaml | 64 +++++++++++++++++++ .../dt-bindings/clock/amlogic,a1-cpu-clkc.h | 19 ++++++ 2 files changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-cpu-clkc.yaml create mode 100644 include/dt-bindings/clock/amlogic,a1-cpu-clkc.h diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-cpu-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-cpu-clkc.yaml new file mode 100644 index 000000000000..f4958b315ed4 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-cpu-clkc.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/amlogic,a1-cpu-clkc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic A1 CPU Clock Control Unit + +maintainers: + - Neil Armstrong + - Jerome Brunet + - Dmitry Rokosov + +properties: + compatible: + const: amlogic,a1-cpu-clkc + + '#clock-cells': + const: 1 + + reg: + maxItems: 1 + + clocks: + items: + - description: input fixed pll div2 + - description: input fixed pll div3 + - description: input sys pll + - description: input oscillator (usually at 24MHz) + + clock-names: + items: + - const: fclk_div2 + - const: fclk_div3 + - const: sys_pll + - const: xtal + +required: + - compatible + - '#clock-cells' + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + apb { + #address-cells = <2>; + #size-cells = <2>; + + clock-controller@fd000000 { + compatible = "amlogic,a1-cpu-clkc"; + reg = <0 0xfd000080 0 0x8>; + #clock-cells = <1>; + clocks = <&clkc_pll CLKID_FCLK_DIV2>, + <&clkc_pll CLKID_FCLK_DIV3>, + <&clkc_pll CLKID_SYS_PLL>, + <&xtal>; + clock-names = "fclk_div2", "fclk_div3", "sys_pll", "xtal"; + }; + }; diff --git a/include/dt-bindings/clock/amlogic,a1-cpu-clkc.h b/include/dt-bindings/clock/amlogic,a1-cpu-clkc.h new file mode 100644 index 000000000000..1d321c6eddb7 --- /dev/null +++ b/include/dt-bindings/clock/amlogic,a1-cpu-clkc.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */ +/* + * Copyright (c) 2024, SaluteDevices. All Rights Reserved. + * Author: Dmitry Rokosov + */ + +#ifndef __A1_CPU_CLKC_H +#define __A1_CPU_CLKC_H + +#define CLKID_CPU_FSOURCE_SEL0 0 +#define CLKID_CPU_FSOURCE_DIV0 1 +#define CLKID_CPU_FSEL0 2 +#define CLKID_CPU_FSOURCE_SEL1 3 +#define CLKID_CPU_FSOURCE_DIV1 4 +#define CLKID_CPU_FSEL1 5 +#define CLKID_CPU_FCLK 6 +#define CLKID_CPU_CLK 7 + +#endif /* __A1_CPU_CLKC_H */