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Wed, 15 May 2024 22:14:13 +0300 From: Dmitry Rokosov To: , , , , , , , CC: , , , , , , , Dmitry Rokosov Subject: [PATCH v3 2/4] arm64: dts: amlogic: a1: declare cpu clock controller Date: Wed, 15 May 2024 22:13:51 +0300 Message-ID: <20240515191405.25395-3-ddrokosov@salutedevices.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240515191405.25395-1-ddrokosov@salutedevices.com> References: <20240515191405.25395-1-ddrokosov@salutedevices.com> MIME-Version: 1.0 X-Originating-IP: [100.64.160.123] X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185260 [May 15 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: ddrokosov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, smtp.sberdevices.ru:7.1.1,5.0.1;100.64.160.123:7.1.2;127.0.0.199:7.1.2;d41d8cd98f00b204e9800998ecf8427e.com:7.1.1;salutedevices.com:7.1.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/05/15 13:12:00 #25231738 X-KSMG-AntiVirus-Status: Clean, skipped X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240515_121415_777277_0912608E X-CRM114-Status: GOOD ( 11.10 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org The Amlogic A1 SoC family relies on the CPU clock controller to generate CPU clocks, serving a crucial function. It has 4 inputs: main oscillator, fixed clocks and system pll. Signed-off-by: Dmitry Rokosov --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index feed2bd7ae48..afb5d7361177 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -3,6 +3,7 @@ * Copyright (c) 2019 Amlogic, Inc. All rights reserved. */ +#include #include #include #include @@ -94,6 +95,19 @@ soc { #size-cells = <2>; ranges; + clkc_cpu: clock-controller@fd000000 { + compatible = "amlogic,a1-cpu-clkc"; + reg = <0 0xfd000080 0 0x8>; + #clock-cells = <1>; + + clocks = <&clkc_pll CLKID_FCLK_DIV2>, + <&clkc_pll CLKID_FCLK_DIV3>, + <&clkc_pll CLKID_SYS_PLL>, + <&xtal>; + clock-names = "fclk_div2", "fclk_div3", + "sys_pll", "xtal"; + }; + spifc: spi@fd000400 { compatible = "amlogic,a1-spifc"; reg = <0x0 0xfd000400 0x0 0x290>;