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[GIT,PULL] clk: meson: updates for v4.21, round 2

Message ID 4506cbc6-4997-8332-3d34-fe753f480b69@baylibre.com (mailing list archive)
State Not Applicable
Headers show
Series [GIT,PULL] clk: meson: updates for v4.21, round 2 | expand

Pull-request

git://github.com/BayLibre/clk-meson.git tags/meson-clk-4.21-2

Message

Neil Armstrong Dec. 11, 2018, 3:15 p.m. UTC
Dear clock maintainers,

Below is a request to pull updates for Amlogic clocks, round 2.

It covers essentially Meson8/Meson8b video clocks, a fix for previous round
and helper addition to simplify clock driver input management.

Thanks,
Neil

The following changes since commit a7d19b05ce817d60ae672c4c112e77892978dc3c:

  clk: meson: meson8b: add the CPU clock post divider clocks (2018-11-23 15:11:58 +0100)

are available in the Git repository at:

  git://github.com/BayLibre/clk-meson.git tags/meson-clk-4.21-2

for you to fetch changes up to f03566d0aa79f9e09a288936980741c479a22fdb:

  clk: meson: axg-audio: use the clk input helper function (2018-12-11 16:07:03 +0100)

----------------------------------------------------------------
Update for meson clocks targeted at v4.21, round 2:
- Fix GXL HDMI Pll fractional bits (from first round)
- Add the Meson8/Meson8b video clocks
- Add clk-input helper and use it for axg-audio clock driver

----------------------------------------------------------------
Jerome Brunet (2):
      clk: meson: add clk-input helper function
      clk: meson: axg-audio: use the clk input helper function

Martin Blumenstingl (3):
      clk: meson: meson8b: fix the offset of vid_pll_dco's N value
      clk: meson: meson8b: add the fractional divider for vid_pll_dco
      clk: meson: meson8b: add the read-only video clock trees

Neil Armstrong (1):
      clk: meson: Fix GXL HDMI PLL fractional bits width

 drivers/clk/meson/Makefile    |   1 +
 drivers/clk/meson/axg-audio.c |  83 ++---
 drivers/clk/meson/clk-input.c |  44 +++
 drivers/clk/meson/clkc.h      |   5 +
 drivers/clk/meson/gxbb.c      |   8 +-
 drivers/clk/meson/meson8b.c   | 746 +++++++++++++++++++++++++++++++++++++++++-
 drivers/clk/meson/meson8b.h   |  54 ++-
 7 files changed, 870 insertions(+), 71 deletions(-)
 create mode 100644 drivers/clk/meson/clk-input.c

Comments

Stephen Boyd Dec. 13, 2018, 9:07 a.m. UTC | #1
Quoting Neil Armstrong (2018-12-11 07:15:09)
> Dear clock maintainers,
> 
> Below is a request to pull updates for Amlogic clocks, round 2.
> 
> It covers essentially Meson8/Meson8b video clocks, a fix for previous round
> and helper addition to simplify clock driver input management.
> 
> Thanks,
> Neil
> 
> The following changes since commit a7d19b05ce817d60ae672c4c112e77892978dc3c:
> 
>   clk: meson: meson8b: add the CPU clock post divider clocks (2018-11-23 15:11:58 +0100)
> 
> are available in the Git repository at:
> 
>   git://github.com/BayLibre/clk-meson.git tags/meson-clk-4.21-2
> 
> for you to fetch changes up to f03566d0aa79f9e09a288936980741c479a22fdb:
> 
>   clk: meson: axg-audio: use the clk input helper function (2018-12-11 16:07:03 +0100)
> 

Thanks. Pulled into clk-next.