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stmmac/RTL8211F/Meson GXBB: TX throughput problems

Message ID CAFBinCAA9J4o2cs4ruSuPRH4qK6izDoxJCneE=Uogk0c+_DSkQ@mail.gmail.com (mailing list archive)
State Not Applicable
Headers show

Commit Message

Martin Blumenstingl Oct. 1, 2016, 8:40 p.m. UTC 
On Sat, Oct 1, 2016 at 10:15 PM, Martin Blumenstingl
<martin.blumenstingl@googlemail.com> wrote:
> On Wed, Sep 14, 2016 at 5:30 PM, Giuseppe CAVALLARO
> <peppe.cavallaro@st.com> wrote:
>> Also you could check the AXI tuning and PBL value. To be honest
>> (thinking about your problem) I can actually suspect some related
>> problem on bus setup. So I suggest you to play with these value
>> (better if you ask for having values from HW validation on your side).
>> Otherwise the stmmac uses a default that cannot be good for your
>> platform. For example, sometime I have seen that PBL is better if
>> reduced to 8 instead of 32 and w/o 4xPBL...
> unfortunately the original kernel/firmware shipped with my device
> seems to be also affected by that TX bug, so comparing with the
> "stock" values does not work for me.
I tried the following changes:
- snps,pbl = <4>; in .dts
- snps,pbl = <2>; in .dts
- snps,pbl = <8>; in .dts and disabled DMA_BUS_MODE_MAXPBL (= 4xPBL) in stmmac

None of these seem to have any impact on the TX problem
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Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
index 2e89ec4..7deab7a 100644
--- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi
@@ -698,6 +698,7 @@ 
 				 <&clkc CLKID_MPLL2>;
 			clock-names = "stmmaceth", "clkin0", "clkin1";
 			phy-mode = "rgmii";
+			snps,pbl = <8>;
 			status = "disabled";
 		};
 	};
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
index 99074695..fffb407 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000_dma.c
@@ -97,7 +97,7 @@  static void dwmac1000_dma_init(void __iomem *ioaddr, int pbl, int fb, int mb,
 	 * so only the bits: 13-8 are programmed with the PBL passed from the
 	 * platform.
 	 */
-	value |= DMA_BUS_MODE_MAXPBL;
+	value &= ~DMA_BUS_MODE_MAXPBL;
 	value &= ~DMA_BUS_MODE_PBL_MASK;
 	value |= (pbl << DMA_BUS_MODE_PBL_SHIFT);