diff mbox series

perf/amlogic: resolve conflict between canvas & pmu

Message ID a81a1ebd-2621-ded1-855d-bd91d923436b@free.fr (mailing list archive)
State New, archived
Headers show
Series perf/amlogic: resolve conflict between canvas & pmu | expand

Commit Message

Marc Gonzalez March 23, 2023, 4:23 p.m. UTC
According to S905X2 Datasheet - Revision 07:

DMC_MON area spans 0xff638080-0xff6380c0
DDR_PLL area spans 0xff638c00-0xff638c34

Round DDR_PLL area size up to 0x40

Fixes: 90cf8e21016f ("arm64: dts: meson: Add DDR PMU node")
Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
---
 arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 12 ++++++------
 drivers/perf/amlogic/meson_g12_ddr_pmu.c          | 34 +++++++++++++++++-----------------
 2 files changed, 23 insertions(+), 23 deletions(-)

Comments

Martin Blumenstingl March 25, 2023, 8:54 p.m. UTC | #1
Hi Marc,

thanks for working on this!

On Thu, Mar 23, 2023 at 5:24 PM Marc Gonzalez <marc.w.gonzalez@free.fr> wrote:
>
> According to S905X2 Datasheet - Revision 07:
>
> DMC_MON area spans 0xff638080-0xff6380c0
> DDR_PLL area spans 0xff638c00-0xff638c34
>
> Round DDR_PLL area size up to 0x40
>
> Fixes: 90cf8e21016f ("arm64: dts: meson: Add DDR PMU node")
This is only partially correct. We also need:
Fixes: 2016e2113d35 ("perf/amlogic: Add support for Amlogic meson G12
SoC DDR PMU driver")

> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
> ---
>  arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 12 ++++++------
>  drivers/perf/amlogic/meson_g12_ddr_pmu.c          | 34 +++++++++++++++++-----------------
I think it makes sense to split this patch into two separate patches,
each of them with the proper Fixes tag attached (and subject prefix).
That way the maintainers of the according files can pick them up (.dts
and driver changes usually go through different trees, I expect this
to be the case here as well).

My understanding is that the driver changes will go through a tree
other than the Amlogic one (I suspect it's Will Deacon's tree).
Please Cc the other maintainers and mailing lists as shown by
scripts/get_maintainer.pl:
  Will Deacon <will@kernel.org> (maintainer:ARM PMU PROFILING AND DEBUGGING)
  Mark Rutland <mark.rutland@arm.com> (maintainer:ARM PMU PROFILING
AND DEBUGGING)
  linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic
Meson SoC support)

The contents of the patch look good to me - so this is only about
organizing things.


Best regards,
Martin
Neil Armstrong March 27, 2023, 7:48 a.m. UTC | #2
On 25/03/2023 21:54, Martin Blumenstingl wrote:
> Hi Marc,
> 
> thanks for working on this!
> 
> On Thu, Mar 23, 2023 at 5:24 PM Marc Gonzalez <marc.w.gonzalez@free.fr> wrote:
>>
>> According to S905X2 Datasheet - Revision 07:
>>
>> DMC_MON area spans 0xff638080-0xff6380c0
>> DDR_PLL area spans 0xff638c00-0xff638c34
>>
>> Round DDR_PLL area size up to 0x40
>>
>> Fixes: 90cf8e21016f ("arm64: dts: meson: Add DDR PMU node")
> This is only partially correct. We also need:
> Fixes: 2016e2113d35 ("perf/amlogic: Add support for Amlogic meson G12
> SoC DDR PMU driver")
> 
>> Signed-off-by: Marc Gonzalez <marc.w.gonzalez@free.fr>
>> ---
>>   arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 12 ++++++------
>>   drivers/perf/amlogic/meson_g12_ddr_pmu.c          | 34 +++++++++++++++++-----------------
> I think it makes sense to split this patch into two separate patches,
> each of them with the proper Fixes tag attached (and subject prefix).
> That way the maintainers of the according files can pick them up (.dts
> and driver changes usually go through different trees, I expect this
> to be the case here as well).
> 
> My understanding is that the driver changes will go through a tree
> other than the Amlogic one (I suspect it's Will Deacon's tree).
> Please Cc the other maintainers and mailing lists as shown by
> scripts/get_maintainer.pl:
>    Will Deacon <will@kernel.org> (maintainer:ARM PMU PROFILING AND DEBUGGING)
>    Mark Rutland <mark.rutland@arm.com> (maintainer:ARM PMU PROFILING
> AND DEBUGGING)
>    linux-arm-kernel@lists.infradead.org (moderated list:ARM/Amlogic
> Meson SoC support)
> 
> The contents of the patch look good to me - so this is only about
> organizing things.

The content is good, but can you send the 3 patches (DMC range, DT fix, Driver fix)
in a separate patchset ?

And avoid sending patches in reply to other patchsets/discussions, this messes things out.

Thanks !
Neil

> 
> 
> Best regards,
> Martin
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index a5653ab1f0b43..1aab65bb5f578 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -1585,6 +1585,12 @@  canvas: video-lut@48 {
 					compatible = "amlogic,canvas";
 					reg = <0x0 0x48 0x0 0x14>;
 				};
+
+				pmu: pmu@80 {
+					reg = <0x0 0x80 0x0 0x40>,
+					      <0x0 0xc00 0x0 0x40>;
+					interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
+				};
 			};
 
 			usb2_phy1: phy@3a000 {
@@ -1710,12 +1716,6 @@  internal_ephy: ethernet-phy@8 {
 			};
 		};
 
-		pmu: pmu@ff638000 {
-			reg = <0x0 0xff638000 0x0 0x100>,
-			      <0x0 0xff638c00 0x0 0x100>;
-			interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
-		};
-
 		aobus: bus@ff800000 {
 			compatible = "simple-bus";
 			reg = <0x0 0xff800000 0x0 0x100000>;
diff --git a/drivers/perf/amlogic/meson_g12_ddr_pmu.c b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
index a78fdb15e26c2..8b643888d5036 100644
--- a/drivers/perf/amlogic/meson_g12_ddr_pmu.c
+++ b/drivers/perf/amlogic/meson_g12_ddr_pmu.c
@@ -21,23 +21,23 @@ 
 #define DMC_QOS_IRQ		BIT(30)
 
 /* DMC bandwidth monitor register address offset */
-#define DMC_MON_G12_CTRL0		(0x20  << 2)
-#define DMC_MON_G12_CTRL1		(0x21  << 2)
-#define DMC_MON_G12_CTRL2		(0x22  << 2)
-#define DMC_MON_G12_CTRL3		(0x23  << 2)
-#define DMC_MON_G12_CTRL4		(0x24  << 2)
-#define DMC_MON_G12_CTRL5		(0x25  << 2)
-#define DMC_MON_G12_CTRL6		(0x26  << 2)
-#define DMC_MON_G12_CTRL7		(0x27  << 2)
-#define DMC_MON_G12_CTRL8		(0x28  << 2)
-
-#define DMC_MON_G12_ALL_REQ_CNT		(0x29  << 2)
-#define DMC_MON_G12_ALL_GRANT_CNT	(0x2a  << 2)
-#define DMC_MON_G12_ONE_GRANT_CNT	(0x2b  << 2)
-#define DMC_MON_G12_SEC_GRANT_CNT	(0x2c  << 2)
-#define DMC_MON_G12_THD_GRANT_CNT	(0x2d  << 2)
-#define DMC_MON_G12_FOR_GRANT_CNT	(0x2e  << 2)
-#define DMC_MON_G12_TIMER		(0x2f  << 2)
+#define DMC_MON_G12_CTRL0		(0x0  << 2)
+#define DMC_MON_G12_CTRL1		(0x1  << 2)
+#define DMC_MON_G12_CTRL2		(0x2  << 2)
+#define DMC_MON_G12_CTRL3		(0x3  << 2)
+#define DMC_MON_G12_CTRL4		(0x4  << 2)
+#define DMC_MON_G12_CTRL5		(0x5  << 2)
+#define DMC_MON_G12_CTRL6		(0x6  << 2)
+#define DMC_MON_G12_CTRL7		(0x7  << 2)
+#define DMC_MON_G12_CTRL8		(0x8  << 2)
+
+#define DMC_MON_G12_ALL_REQ_CNT		(0x9  << 2)
+#define DMC_MON_G12_ALL_GRANT_CNT	(0xa  << 2)
+#define DMC_MON_G12_ONE_GRANT_CNT	(0xb  << 2)
+#define DMC_MON_G12_SEC_GRANT_CNT	(0xc  << 2)
+#define DMC_MON_G12_THD_GRANT_CNT	(0xd  << 2)
+#define DMC_MON_G12_FOR_GRANT_CNT	(0xe  << 2)
+#define DMC_MON_G12_TIMER		(0xf  << 2)
 
 /* Each bit represent a axi line */
 PMU_FORMAT_ATTR(event, "config:0-7");