From patchwork Tue Oct 23 22:39:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna Reddy X-Patchwork-Id: 10653847 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02AC213A4 for ; Tue, 23 Oct 2018 22:39:27 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E170329F51 for ; Tue, 23 Oct 2018 22:39:26 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D4E4C29F69; Tue, 23 Oct 2018 22:39:26 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 639C929F51 for ; Tue, 23 Oct 2018 22:39:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=P84X1BkJqTz3UbGzh3tOw5cEchZcj7Rqj9Sw18AB+2A=; b=tanbkfdZB+aqm2 X9y4Ef1RVV3S45FiJSyQvWeK4re044JzYc6BcnUf90iZGCx9QReB/A3mtKb4akRlSCbDo9fmnKuc4 Sb+mW8Z7z3DPpR0Map8E0S7aUFqTatgnIWqydrQsuIsnXH18F3QN/PvD08rZxHSgN6v+9V7f+PeJ2 mu6B/h/S25UcGAn140wC3ZKuUv+peVqKiF0//m31LzLCSVOskfFTbHgytZvOcPJoJBFm4UpwRXE8S fjqgmvjxAvF9cRuCIx7k4+3fvn2/rHiT6o0iwwejSxSFz7rmQ0pzk71fATMvaVcyuL0dkSdqd/CtI tD/NTTjWWFaka41QHTsg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gF5Ka-0001Qw-88; Tue, 23 Oct 2018 22:39:20 +0000 Received: from hqemgate14.nvidia.com ([216.228.121.143]) by bombadil.infradead.org with esmtps (Exim 4.90_1 #2 (Red Hat Linux)) id 1gF5KX-0001Oo-CZ for linux-arm-kernel@lists.infradead.org; Tue, 23 Oct 2018 22:39:19 +0000 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate14.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Tue, 23 Oct 2018 15:38:53 -0700 Received: from HQMAIL103.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 23 Oct 2018 15:39:02 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 23 Oct 2018 15:39:02 -0700 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 23 Oct 2018 22:39:02 +0000 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Tue, 23 Oct 2018 22:39:02 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1395.4 via Frontend Transport; Tue, 23 Oct 2018 22:39:02 +0000 Received: from vdumpa-ubuntu.nvidia.com (Not Verified[172.17.173.140]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Tue, 23 Oct 2018 15:39:02 -0700 From: Krishna Reddy To: , , Subject: [PATCH 0/3] Add Tegra194 Dual ARM SMMU driver Date: Tue, 23 Oct 2018 15:39:04 -0700 Message-ID: <1540334347-7178-1-git-send-email-vdumpa@nvidia.com> X-Mailer: git-send-email 2.1.4 X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1540334333; bh=dXkqI3kipmqmY/E4Vk6BKX5LPVnWoHTIBDi0dsrwJBo=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: X-NVConfidentiality:MIME-Version:Content-Type; b=mWHIFQyi+0Ug65CaPVd0pzCtMPgBPm+Wkm4PCkXvusZEESzj92cZGFXdrSfCpXZkG bS6bZU2KValPNoxpAqkU1lWDequidUGTJxxdb1N5yf1WQxmSdcl6igWYScceDSDAS2 gzA+Rd7b7A/+3eLNz2fYofAe+Qf7P+GxLHuyEaFFVg4aSVcEh/9buW7FYhtVnRiW80 mBbG5o3ARSh7FYPWNC5oe5Dib+snU+tNerBbr6Uykro4+3jkt0RS7T3sO1T/hutpe+ V+/oSX7MFkorAgBwoZzp1IMkO6lwSczIhSEHPmDgU7au+FvWltVMCqHCDBFAtBN1jb uEkfnl1vBLcyQ== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181023_153917_479719_2DBECABE X-CRM114-Status: GOOD ( 10.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: snikam@nvidia.com, praithatha@nvidia.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, talho@nvidia.com, yhsu@nvidia.com, linux-tegra@vger.kernel.org, treding@nvidia.com, avanbrunt@nvidia.com, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP NVIDIA's Xavier (Tegra194) SOC has three ARM SMMU(MMU-500) instances. Two of the SMMU instances are used to interleave IOVA accesses across them. The IOVA accesses from HW devices are interleaved across these two SMMU instances and they need to be programmed identical. The existing ARM SMMU driver can't be used in its current form for programming the two SMMU instances identically. But, most of the code can be shared between ARM SMMU driver and Tegra194 SMMU driver. Page fault handling and TLB sync operations need to know about specific instance of SMMU for correct fault handling and optimal TLB sync wait. Rest of the code doesn't need to know about number of SMMU instances. Based on this fact, The patch series here rearranges the arm-smmu.c code to allow sharing most of the ARM SMMU programming/iommu_ops code between ARM SMMU driver and Tegra194 SMMU driver and transparently handles programming of two SMMU instances. The third SMMU instance would use the existing ARM SMMU driver. Krishna Reddy (3): iommu/arm-smmu: rearrange arm-smmu.c code iommu/arm-smmu: Prepare fault, probe, sync functions for sharing code iommu/tegra194_smmu: Add Tegra194 SMMU driver drivers/iommu/Makefile | 1 + drivers/iommu/arm-smmu-common.c | 1971 +++++++++++++++++++++++++++++++++++ drivers/iommu/arm-smmu-common.h | 256 +++++ drivers/iommu/arm-smmu.c | 2167 +-------------------------------------- drivers/iommu/tegra194-smmu.c | 201 ++++ 5 files changed, 2436 insertions(+), 2160 deletions(-) create mode 100644 drivers/iommu/arm-smmu-common.c create mode 100644 drivers/iommu/arm-smmu-common.h create mode 100644 drivers/iommu/tegra194-smmu.c