From patchwork Wed Dec 5 15:30:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Murray X-Patchwork-Id: 10714419 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 413931731 for ; Wed, 5 Dec 2018 15:31:48 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F77E2D530 for ; Wed, 5 Dec 2018 15:31:48 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2D50E2D584; Wed, 5 Dec 2018 15:31:48 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id C9F222D530 for ; Wed, 5 Dec 2018 15:31:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=abIT669YwXvXp52mtPDYXD94AeRrBRbjf/lDKCmCny8=; b=RCM RcKBH4BxxoCcp6GAXdxWF+VGf2TARS+4kABLyBIZP/4x0R3F2PbNIvt8H2AAnPiTNYCZd00FK/lo6 W5DUY/VvfZlDybEQ1ztuwuzPa3zzPwq4aiu5jvDN0xMuoirM17p6svkCsMUsqhl8jWwLIlu2hNIk3 Utdv5epwx4WrCEl4ao3RyhvnnHa/PBU5f0FLhf1XyrSGw1mvNEGlndDX5/M2UZGX3rMi71uqtmrmi 5x8ZQLZo4/u/Q9umf/e9v9ergAQKqm47z2mZ0uwrQKqwlgI569rIji8Eo64ZPYkjQnL+Tf/V/jXVq yRbAM3wC6jMOvYeuwTZZdLFZbBZLZNg==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUZ9J-00051A-UN; Wed, 05 Dec 2018 15:31:41 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1gUZ8E-0003nf-KE for linux-arm-kernel@lists.infradead.org; Wed, 05 Dec 2018 15:30:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 14F4C80D; Wed, 5 Dec 2018 07:30:24 -0800 (PST) Received: from e119886-lin.cambridge.arm.com (unknown [10.37.6.11]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 212193F5AF; Wed, 5 Dec 2018 07:30:21 -0800 (PST) From: Andrew Murray To: Christoffer Dall , Marc Zyngier , Catalin Marinas , Will Deacon , Mark Rutland Subject: [PATCH v5 0/4] arm64: Support perf event modifiers :G and :H Date: Wed, 5 Dec 2018 15:30:11 +0000 Message-Id: <1544023815-16958-1-git-send-email-andrew.murray@arm.com> X-Mailer: git-send-email 2.7.4 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181205_073034_684131_15D4E296 X-CRM114-Status: GOOD ( 13.14 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Suzuki K Poulose , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Julien Thierry MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patchset provides support for perf event modifiers :G and :H which allows for filtering of PMU events between host and guests when used with KVM. As the underlying hardware cannot distinguish between guest and host context, the performance counters must be stopped and started upon entry/exit to the guest. This is performed at EL2 in a way that minimizes overhead and improves accuracy of recording events that only occur in the requested context. This has been tested with VHE and non-VHE kernels with a KVM guest. Changes from v4: - Prevent unnecessary write_sysreg calls by improving __pmu_switch_to_xxx logic. Changes from v3: - Remove confusing _only suffix from bitfields in kvm_cpu_context - Remove unnecessary condition when clearing event bits in disable - Simplify API of KVM accessors - Prevent unnecessary setting of pmcnten when guest/host events are the same. Changes from v2: - Ensured that exclude_kernel works for guest - Removed unnecessary exclusion of EL2 with exclude_host on !VHE - Renamed kvm_clr_set_host_pmu_events to reflect args order - Added additional information to isb patch Changes from v1: - Removed unnecessary exclusion of EL1 with exclude_guest on VHE - Removed unnecessary isb from existing perf_event.c driver - Folded perf_event.c patches together - Added additional information to last patch commit message Andrew Murray (4): arm64: arm_pmu: remove unnecessary isb instruction arm64: KVM: add accessors to track guest/host only counters arm64: arm_pmu: Add support for exclude_host/exclude_guest attributes arm64: KVM: Enable support for :G/:H perf event modifiers arch/arm64/include/asm/kvm_host.h | 24 +++++++++++++++++++ arch/arm64/kernel/perf_event.c | 49 ++++++++++++++++++++++++++++++++------- arch/arm64/kvm/hyp/switch.c | 38 ++++++++++++++++++++++++++++++ 3 files changed, 103 insertions(+), 8 deletions(-)