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Ip=[149.199.60.100]; Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2PR02MB498 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190422_073814_528815_25B2992C X-CRM114-Status: GOOD ( 10.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Add Xilinx AMS driver which is used for Xilinx's ZynqMP AMS controller. This AMS driver is used to report various interface voltages and temperatures across the system. This driver will be used by iio-hwmon to repport voltages and temperatures across the system by using various channel interfaces. This driver handles AMS module including PS-Sysmon & PL-Sysmon. The binding documentation is added for understanding of AMS, PS, PL Sysmon Channels. Changes in v2: - Added documentation for sysfs (Patch-2) - Addressed code style review comments - Patch-2 (Now it is Patch-3) - Arranged the includes in alphabetical order - Removed the wrapper 'ams_pl_write_reg()' and used writel instead - Removed the unnecessary delay of 1ms and used polling of EOC instead - Removed spin_lock and used mutex only. - Used request_irq() instead of devm_request_irq() and handled respective error conditions - Moved contents of xilinx-ams.h to inline with xilinx-ams.c - Patch-1 - Addressed Documentation style comments Changes in v3: - Updated bindings document with the suggested modification in v2 review - Removed documentation for sysfs - Removed extended names for channels in the Xilinx AMS driver - Modified dts to use ranges for child nodes - Reduced address and size cells to 32-bit instead of 64-bit Changes in v4: - Updated bindings document with the suggested modification in v3 review - Changed the Device Tree property 'ranges' for child nodes - Used Channel Numbers as 'reg' value in DT to avoid confusion - Removed unused NULL arguments as suggested in v3 patch review - Addressed comments on Device Tree property naming Manish Narani (3): dt-bindings: iio: adc: Add Xilinx AMS binding documentation iio: adc: Add Xilinx AMS driver arm64: zynqmp: DT: Add Xilinx AMS node .../devicetree/bindings/iio/adc/xilinx-ams.txt | 183 +++ arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 26 + drivers/iio/adc/Kconfig | 10 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/xilinx-ams.c | 1341 ++++++++++++++++++++ 5 files changed, 1561 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/xilinx-ams.txt create mode 100644 drivers/iio/adc/xilinx-ams.c