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Mon, 27 May 2019 12:21:47 +0200 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 636BB31; Mon, 27 May 2019 10:21:46 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas24.st.com [10.75.90.94]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 347112804; Mon, 27 May 2019 10:21:46 +0000 (GMT) Received: from SAFEX1HUBCAS23.st.com (10.75.90.47) by Safex1hubcas24.st.com (10.75.90.94) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 27 May 2019 12:21:46 +0200 Received: from localhost (10.201.23.97) by webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 27 May 2019 12:21:45 +0200 From: =?utf-8?q?Yannick_Fertr=C3=A9?= To: Andrzej Hajda , Laurent Pinchart , David Airlie , "Daniel Vetter" , Heiko Stuebner , Sam Ravnborg , Yannick Fertre , Nickey Yang , Philippe Cornu , Benjamin Gaignard , Vincent Abriou , Maxime Coquelin , Alexandre Torgue , , , , Subject: [PATCH v1 0/2] dw-mipi-dsi: add power on & off optional phy ops and update stm Date: Mon, 27 May 2019 12:21:37 +0200 Message-ID: <1558952499-15418-1-git-send-email-yannick.fertre@st.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.201.23.97] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-27_07:, , signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190527_032158_804789_58E91680 X-CRM114-Status: GOOD ( 11.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP These patches fix a bug concerning an access issue to display controler (ltdc) registers. If the physical layer of the DSI is started too early then the fifo DSI are full very quickly which implies ltdc register's access hang up. To avoid this problem, it is necessary to start the DSI physical layer only when the bridge is enable. Yannick Fertré (2): drm/bridge/synopsys: dsi: add power on/off optional phy ops drm/stm: dsi: add power on/off phy ops drivers/gpu/drm/bridge/synopsys/dw-mipi-dsi.c | 8 ++++++++ drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 21 ++++++++++++++++++++- include/drm/bridge/dw_mipi_dsi.h | 2 ++ 3 files changed, 30 insertions(+), 1 deletion(-) --- 2.7.4