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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org |
Series | imx: support i.MX7ULP HSRUN mode | expand |
Hi Peng, On Tue, Sep 15, 2020 at 11:55 PM <peng.fan@nxp.com> wrote: > > From: Peng Fan <peng.fan@nxp.com> > > V2: > Update to use pmc0/pmc1 following hardware naming > > This patchset is to add HSRUN mode support. > Patch 1,2 is to add binding doc and dts node > Patch 3 is to support HSRUN mode > Patch 4 is to use wait mode when HSRUN working per hardware state machine requirement. > > Peng Fan (4): > dt-bindings: fsl: add i.MX7ULP PMC > ARM: dts: imx7ulp: add pmc node > ARM: imx: imx7ulp: support HSRUN mode > ARM: imx: cpuidle-imx7ulp: Stop mode disallowed when HSRUN It seems that a patch adding the 720MHz HSRUN operational point in imx7ulp.dtsi is missing. Thanks
From: Peng Fan <peng.fan@nxp.com> V2: Update to use pmc0/pmc1 following hardware naming This patchset is to add HSRUN mode support. Patch 1,2 is to add binding doc and dts node Patch 3 is to support HSRUN mode Patch 4 is to use wait mode when HSRUN working per hardware state machine requirement. Peng Fan (4): dt-bindings: fsl: add i.MX7ULP PMC ARM: dts: imx7ulp: add pmc node ARM: imx: imx7ulp: support HSRUN mode ARM: imx: cpuidle-imx7ulp: Stop mode disallowed when HSRUN .../arm/freescale/fsl,imx7ulp-pm.yaml | 6 ++++- arch/arm/boot/dts/imx7ulp.dtsi | 10 ++++++++ arch/arm/mach-imx/common.h | 1 + arch/arm/mach-imx/cpuidle-imx7ulp.c | 14 ++++++++--- arch/arm/mach-imx/pm-imx7ulp.c | 25 +++++++++++++++++++ 5 files changed, 52 insertions(+), 4 deletions(-)