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Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kurtt-0003xO-QA; Thu, 31 Dec 2020 06:57:33 +0000 Received: from szxga05-in.huawei.com ([45.249.212.191]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kurtg-0003tP-NY for linux-arm-kernel@lists.infradead.org; Thu, 31 Dec 2020 06:57:22 +0000 Received: from DGGEMS413-HUB.china.huawei.com (unknown [172.30.72.60]) by szxga05-in.huawei.com (SkyGuard) with ESMTP id 4D5zT93GTBzj1mw; Thu, 31 Dec 2020 14:56:13 +0800 (CST) Received: from localhost.localdomain (10.69.192.56) by DGGEMS413-HUB.china.huawei.com (10.3.19.213) with Microsoft SMTP Server id 14.3.498.0; Thu, 31 Dec 2020 14:56:56 +0800 From: Shaokun Zhang To: Subject: [PATCH 0/8] Add support for HiSilicon Hip09 uncore PMU driver Date: Thu, 31 Dec 2020 14:19:28 +0800 Message-ID: <1609395576-32775-1-git-send-email-zhangshaokun@hisilicon.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.69.192.56] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201231_015721_349814_B9D2DE99 X-CRM114-Status: GOOD ( 10.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Qi Liu , John Garry , Shaokun Zhang , Jonathan Cameron , Will Deacon Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patchset adds support for HiSilicon Hip09 SoC uncore PMUs driver which is PMU v2 and it includes: (a) Refactor interrupt registration and handler function for later new uncore PMU driver in patch1; (b) Update the PMU version suffiex for existing driver in patch2 (b) Some new functions are added on L3C/HHA PMU in patch3/4; (c) New DDRC PMU model is supported using programable counter and supports more events in patch5; (d) Add new modules SLLC and PA PMU drivers in patch6/7; (e) Update the perf document for the new functions and modules in patch8; Cc: Mark Rutland Cc: Will Deacon Cc: John Garry Cc: Jonathan Cameron Cc: Qi Liu Shaokun Zhang (8): drivers/perf: hisi: Refactor code for more uncore PMUs drivers/perf: hisi: Add PMU version for uncore PMU drivers. drivers/perf: hisi: Add new functions for L3C PMU drivers/perf: hisi: Add new functions for HHA PMU drivers/perf: hisi: Update DDRC PMU for programable counter drivers/perf: hisi: Add support for HiSilicon SLLC PMU driver drivers/perf: hisi: Add support for HiSilicon PA PMU driver docs: perf: Add new description on HiSilicon uncore PMU v2 Documentation/admin-guide/perf/hisi-pmu.rst | 54 +++ drivers/perf/hisilicon/Makefile | 3 +- drivers/perf/hisilicon/hisi_uncore_ddrc_pmu.c | 346 +++++++++++------ drivers/perf/hisilicon/hisi_uncore_hha_pmu.c | 301 ++++++++++----- drivers/perf/hisilicon/hisi_uncore_l3c_pmu.c | 353 ++++++++++++----- drivers/perf/hisilicon/hisi_uncore_pa_pmu.c | 498 ++++++++++++++++++++++++ drivers/perf/hisilicon/hisi_uncore_pmu.c | 76 +++- drivers/perf/hisilicon/hisi_uncore_pmu.h | 19 +- drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c | 530 ++++++++++++++++++++++++++ include/linux/cpuhotplug.h | 2 + 10 files changed, 1878 insertions(+), 304 deletions(-) create mode 100644 drivers/perf/hisilicon/hisi_uncore_pa_pmu.c create mode 100644 drivers/perf/hisilicon/hisi_uncore_sllc_pmu.c