From patchwork Fri Aug 2 06:46:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongxing Zhu X-Patchwork-Id: 13751173 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B20DEC52D71 for ; Fri, 2 Aug 2024 07:07:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:Subject:Cc: To:From:Reply-To:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=CzQtWEsJ0sjD1y3kTDFyErzQI4O9isGP+yBNAoZuz2w=; b=4M+PWmsvpblCWxT0BOmo+VBOin KujW2Ez6d9ik+unoIkCbdfCtDjScxq0yZmzW7cK73omZUKwNGEqzeW1vBD7S7om9yUwPGgNpAo0mH r8bnR91wzo8F8MBnb4HU/hkXnbVnyqxXEjGcwlt0jBxW6p2XYxifG7m3A+7KTHT/kYXawPPs1koW/ Aher7xSlSN8PBblQQwQFIy1iMH+l6dGi3/D2lGFO2rtVg8MGym14shy/Zd8PBWRi3Rlp1NDZB45Rp TFKg/nodv1ZNNMm5afl5THH8hxgTd8FPZnKPu+/f5U9oT1jPReQ+b4UZrSYtzI6IvALU/f5IyTHdA sGpz15VA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZmNL-00000007sTL-15Dl; Fri, 02 Aug 2024 07:06:55 +0000 Received: from inva020.nxp.com ([92.121.34.13]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sZmMq-00000007sK6-1eMY for linux-arm-kernel@lists.infradead.org; Fri, 02 Aug 2024 07:06:25 +0000 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 6A0A61A1F3F; Fri, 2 Aug 2024 09:06:22 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 3B68E1A1F36; Fri, 2 Aug 2024 09:06:22 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 8A269181D0FC; Fri, 2 Aug 2024 15:06:20 +0800 (+08) From: Richard Zhu To: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, l.stach@pengutronix.de Cc: hongxing.zhu@nxp.com, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, imx@lists.linux.dev Subject: [PATCH v5 0/5] Refine i.MX8QM SATA based on generic PHY callbacks Date: Fri, 2 Aug 2024 14:46:48 +0800 Message-Id: <1722581213-15221-1-git-send-email-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.7.4 X-Virus-Scanned: ClamAV using ClamSMTP X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240802_000624_590743_0429CA44 X-CRM114-Status: UNSURE ( 7.61 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org V5 main changes: Thanks for Niklas' kind help. - Drop 32bit DMA limit commit, since the "dma-ranges" of DT can overcome this limitation. V4 main changes: Thanks for Niklas' comments. - Update the commit message in #2 patch of v4. - Split the clean up unrelated codes to #3 and #4 of v4. - Remove the Cc: stable@vger.kernel.org and Fixes tag in #5 of v4. V3 main changes: - Use GENMASK() macro to define the _MASK. - Refine the macro names. V2 main changes: - Add Rob's reviewed-by in the binding patch. - Re-name the error out lables and new RXWM macro more descriptive. - In #3 patch, add one fix tag, and CC stable kernel. Based on i.MX8QM HSIO PHY driver, refine i.MX8QM SATA driver by using PHY interface. [PATCH v5 1/5] dt-bindings: ata: Add i.MX8QM AHCI compatible string [PATCH v5 2/5] ata: ahci_imx: Clean up code by using i.MX8Q HSIO PHY [PATCH v5 3/5] ata: ahci_imx: AHB clock rate setting is not required [PATCH v5 4/5] ata: ahci_imx: Enlarge RX water mark for i.MX8QM SATA [PATCH v5 5/5] ata: ahci_imx: Correct the email address Documentation/devicetree/bindings/ata/imx-sata.yaml | 47 +++++++++++ drivers/ata/ahci_imx.c | 403 +++++++++++++++++++++++------------------------------------------------------------------ 2 files changed, 152 insertions(+), 298 deletions(-)