From patchwork Thu Sep 27 16:15:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 10618199 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id ACB671759 for ; Thu, 27 Sep 2018 16:25:00 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9A6342BBA9 for ; Thu, 27 Sep 2018 16:25:00 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8ED1B2BBC9; Thu, 27 Sep 2018 16:25:00 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 2DEF02BBCB for ; Thu, 27 Sep 2018 16:24:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=AH4/MSwjVuuXtZaLK0XERVoZ3auseD5aepCmk8xKeU0=; b=njGLp5NyUsJzUK nv/HTjApf1sFYgUxnwp1UDY0UgwSe8WB7tuqGsqJoU/df8E4W+S466VDnVrTjQ4hXvOB/M6FZA9tU nnIOCTu9KUZMRW5oopj3cJBQn63WP89g2nJXSy7GtASIgIbUA2Lm460vfC5EHUlHhhzG+Bauw1zMr Wmcz66/jHHyi5XSd767wxnBO9sUdX8VTK6is6sCaYqi0zl+EaLra2fueNyRqFV/Fa2eU0Ratx/x4v 9oCLbfTOpBB9VYzDdut0qrbPaYQav4S9Q6Jlyyib3pdciRKjTrAPUVHTATB/Xjnb8nq7L7CamwT79 NeUmvDHr5PTAJcSFkJrw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g5Z5x-0006pt-5I; Thu, 27 Sep 2018 16:24:53 +0000 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70] helo=foss.arm.com) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1g5Yxv-0002wm-R9 for linux-arm-kernel@lists.infradead.org; Thu, 27 Sep 2018 16:16:39 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7E4097A9; Thu, 27 Sep 2018 09:16:03 -0700 (PDT) Received: from filthy-habits.Emea.Arm.com (filthy-habits.emea.arm.com [10.4.13.85]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 81D423F5B3; Thu, 27 Sep 2018 09:16:02 -0700 (PDT) From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 0/7] arm64: Workaround for Cortex-A76 erratum 1188873 Date: Thu, 27 Sep 2018 17:15:27 +0100 Message-Id: <20180927161534.247926-1-marc.zyngier@arm.com> X-Mailer: git-send-email 2.19.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20180927_091635_911831_49D6A0D7 X-CRM114-Status: GOOD ( 11.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , Will Deacon Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Early revisions of Cortex-A76 suffer from erratum 1188873 which reads "MRC read following MRRC read of specific Generic Timer in AArch32 might give incorrect result" (see [1], registration required...). The workaround is to trap all EL0 accesses to the virtual timer (as well as CNTFRQ_EL0) and emulate it at EL1 (EL2 if running VHE). This results in some infrastructure for handling AArch32 CP15 traps at EL1, with all the joy of handling conditional instructions and IT advance... A lot of that code comes from KVM, and could potentially be shared. Most of these patches were posted as part of a different series about a year ago[2] [1] https://silver.arm.com/download/Documentation/BX500-DA-10008-r0p0-00rel0/Arm_Cortex-A76_MP052_Software_Developer_Errata_Notice_v9.pdf [2] http://lists.infradead.org/pipermail/linux-arm-kernel/2017-July/520426.html Marc Zyngier (7): arm64: Add decoding macros for CP15_32 and CP15_64 traps arm64: compat: Add separate CP15 trapping hook arm64: compat: Add condition code checks and IT advance arm64: compat: Add cp15_32 and cp15_64 handler arrays arm64: compat: Add CNTVCT trap handler arm64: compat: Add CNTFRQ trap handler arm64: arch_timer: Add workaround for ARM erratum 1188873 arch/arm64/Kconfig | 12 +++ arch/arm64/include/asm/cpucaps.h | 3 +- arch/arm64/include/asm/cputype.h | 2 + arch/arm64/include/asm/esr.h | 58 ++++++++++ arch/arm64/kernel/cpu_errata.c | 8 ++ arch/arm64/kernel/entry.S | 15 ++- arch/arm64/kernel/traps.c | 155 +++++++++++++++++++++++++++ drivers/clocksource/arm_arch_timer.c | 15 +++ 8 files changed, 265 insertions(+), 3 deletions(-)