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Hou" To: "linux-pci@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "l.subrahmanya@mobiveil.co.in" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" Subject: [PATCH 00/23] PCI: refactor the Mobiveil driver and add PCIe support for NXP LX SoCs Thread-Topic: [PATCH 00/23] PCI: refactor the Mobiveil driver and add PCIe support for NXP LX SoCs Thread-Index: AQHUddNJ+rvIvxvt8E65Px/kcnc2Yw== Date: Tue, 6 Nov 2018 13:19:03 +0000 Message-ID: <20181106131807.29951-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: HK0PR03CA0008.apcprd03.prod.outlook.com (2603:1096:203:2e::20) To DB5PR04MB1221.eurprd04.prod.outlook.com (2a01:111:e400:51c2::27) authentication-results: spf=none (sender IP is ) smtp.mailfrom=zhiqiang.hou@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.73] x-ms-publictraffictype: Email x-microsoft-exchange-diagnostics: 1; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB5PR04MB0984; H:DB5PR04MB1221.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: 07x0hmaCEty1di3jQCBkn/9YBakQ5QB+lDJtxW1PIcwg3ONpgbyxG1t3MP3E+C2F9ui+U89qEXHM+ybTFf1jrYo9u6OIcSFXWQeNfClMjte4m3Pcif6d/SXFjQ0zftQYeyOoxfKYpUMudM3VOuyXI665HCqnGFEP/yzzjVHY5L1A/5re91PhOkneDG2d02V4BWphLQs8QIF4wvzjkEahehPO3XWyvf/M7Rwg7H9fTV8EcPF6oBUtxi1V+C8LDr0GJWNmpfmeJLGuuAcfgH2aasG+u1MBinew5zsNVAVHQPY9R+mC9+22Juy0dYJPf0mB30uFyj0xBGh5mY0WXSy4YSTbqOfRAyjkXfwEdksWCbU= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-ID: <49EC5FCA622C5144B1E825412F41A7AD@eurprd04.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 492a5134-c58a-4a46-b1ec-08d643ea6bc1 X-MS-Exchange-CrossTenant-originalarrivaltime: 06 Nov 2018 13:19:03.5904 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB5PR04MB0984 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181106_051938_098931_76DF8FFE X-CRM114-Status: GOOD ( 15.38 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "M.h. Lian" , "Z.q. Hou" , Xiaowei Bao , Mingkai Hu Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: Hou Zhiqiang This patch set is aim to refactor the Mobiveil driver and add PCIe support for NXP LX series SoCs. Hou Zhiqiang (23): PCI: mobiveil: uniform the register accessors PCI: mobiveil: format the code without function change PCI: mobiveil: correct the returned error number PCI: mobiveil: remove flag MSI_FLAG_MULTI_PCI_MSI PCI: mobiveil: correct PCI base address in MEM/IO outbound windows PCI: mobiveil: replace the resource list iteration function PCI: mobiveil: use WIN_NUM_0 explicitly for CFG outbound window PCI: mobiveil: use the 1st inbound window for MEM inbound transactions PCI: mobiveil: correct the inbound/outbound window setup routine PCI: mobiveil: fix the INTx process error PCI: mobiveil: only fixup the Class Code field PCI: mobiveil: move out the link up waiting from mobiveil_host_init PCI: mobiveil: move irq chained handler setup out of DT parse PCI: mobiveil: initialize Primary/Secondary/Subordinate bus number dt-bindings: pci: mobiveil: change gpio_slave and apb_csr to optional PCI: mobiveil: refactor the Mobiveil driver PCI: mobiveil: continue to initialize the host upon no PCIe link PCI: mobiveil: disabled IB and OB windows set by bootloader PCI: mobiveil: add Byte and Half-Word width register accessors PCI: mobiveil: change prototype of function mobiveil_host_init dt-bindings: pci: Add NXP LX SoCs PCIe controller PCI: mobiveil: add PCIe RC driver for NXP LX series SoCs arm64: dts: freescale: lx2160a: add pcie DT nodes .../devicetree/bindings/pci/lx-pci.txt | 52 ++ .../devicetree/bindings/pci/mobiveil-pcie.txt | 2 + MAINTAINERS | 10 +- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 157 ++++ drivers/pci/controller/Kconfig | 11 +- drivers/pci/controller/Makefile | 2 +- drivers/pci/controller/mobiveil/Kconfig | 34 + drivers/pci/controller/mobiveil/Makefile | 5 + drivers/pci/controller/mobiveil/pci-lx.c | 222 +++++ .../controller/mobiveil/pcie-mobiveil-host.c | 622 +++++++++++++ .../controller/mobiveil/pcie-mobiveil-plat.c | 54 ++ .../pci/controller/mobiveil/pcie-mobiveil.c | 245 +++++ .../pci/controller/mobiveil/pcie-mobiveil.h | 221 +++++ drivers/pci/controller/pcie-mobiveil.c | 861 ------------------ 14 files changed, 1625 insertions(+), 873 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/lx-pci.txt create mode 100644 drivers/pci/controller/mobiveil/Kconfig create mode 100644 drivers/pci/controller/mobiveil/Makefile create mode 100644 drivers/pci/controller/mobiveil/pci-lx.c create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-host.c create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil-plat.c create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.c create mode 100644 drivers/pci/controller/mobiveil/pcie-mobiveil.h delete mode 100644 drivers/pci/controller/pcie-mobiveil.c