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Fri, 1 Feb 2019 16:16:58 +0000 Received: from josephl-linux.nvidia.com (Not Verified[10.19.108.132]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Fri, 01 Feb 2019 08:16:58 -0800 From: Joseph Lo To: Thierry Reding , Jonathan Hunter , Daniel Lezcano , "Thomas Gleixner" Subject: [PATCH V6 0/7] Add CPUidle support for Tegra210 Date: Sat, 2 Feb 2019 00:16:47 +0800 Message-ID: <20190201161654.18315-1-josephl@nvidia.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-NVConfidentiality: public DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1549037790; bh=uJscNHq2iMjdct3rzEKX6s6cmP5B4dRbAdT8oBFTQU4=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:X-NVConfidentiality:Content-Transfer-Encoding: Content-Type; b=kl2572JsMkd0Ei4k6F/qkG5kTxnpO4no0j0AXoC1WnRCshrBzw4zej5kZLm+OShUF iSql6XWw9suXECeMGwl6/m0I2wRJ08S1RKI55MjUHTZUDC5OJBNbLy5aDScYfupEl6 WphU494Zy97cz7+PokHQ5QI8aLIgXGEZeEj7UmWvnS9o2/6kgvfMLpefwHBS31+nrL 5UwSSwvwYldoTlliUpXX/AP+wqmzezpDSdLzesO3VOkII14F7y7v65NuDJQ/DRySVr Op9ddm+AYk1ihNSpwbbaFsyzo4/ocdtg3asZDdhae++6Uu3mTUFQYOwrvTyYF6gGpZ 9sAFHv5s6D/rQ== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190201_081659_743120_D3F15383 X-CRM114-Status: GOOD ( 11.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-tegra@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Joseph Lo Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patch series adds CPUidle support for Tegra210, which supports power-down state (C7) for CPU cores. And due to arch timer cannot work across CPU core power-down and power on reset signal event. We introduce Tegra210 timer driver to work as clock event device. So it can be the wake-up source of CPU cores when they idled in the power-down state. Fix in V6: * refine the timer defines in the timer driver (PATCH 2) * add ack tags from Jon Hunter. Fixed in V5: * Just resend this whole series again with timer and Tegra maintainers included Fixed in V4: * merge timer-tegra210.c into timer-tegra20.c * add a new patch to select TEGRA_TIMER by default for Tegra210 Fixed in V3: * use timer-of API for Tegra210 timer driver Fixed in V2: * list all the timer IRQs in the binding doc and dts file * add error clean-up code in timer driver * add entry-latency-us and exit-latency-us properties for idle-states DT node Joseph Lo (7): dt-bindings: timer: add Tegra210 timer clocksource: tegra: add Tegra210 timer support soc/tegra: default select TEGRA_TIMER for Tegra210 arm64: dts: tegra210: fix timer node arm64: dts: tegra210: add CPU idle states properties arm64: dts: tegra210-p2180: Enable CPU idle support arm64: dts: tegra210-smaug: Enable CPU idle support .../bindings/timer/nvidia,tegra210-timer.txt | 36 ++ .../arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 6 + arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 7 + arch/arm64/boot/dts/nvidia/tegra210.dtsi | 33 +- drivers/clocksource/Kconfig | 2 +- drivers/clocksource/timer-tegra20.c | 371 +++++++++++++----- drivers/soc/tegra/Kconfig | 1 + include/linux/cpuhotplug.h | 1 + 8 files changed, 350 insertions(+), 107 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/nvidia,tegra210-timer.txt