Message ID | 20190202040653.1217-1-tudor.ambarus@microchip.com (mailing list archive) |
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spi: atmel-quadspi: introduce sam9x60 qspi controller
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From: Tudor Ambarus <tudor.ambarus@microchip.com> Patches from 1 to 11 are minor fixes or cosmetics. Patches 12 and 13 introduce the sam9x60 qspi controller. sam9x60 qspi controller tested with sst26vf064b jedec,spi-nor flash. Backward compatibility test done on sama5d2 qspi controller and mx25l25635e jedec,spi-nor flash. The patches are generated on top of for-next branch. v3: - update smm value when different. - treat just regular spi transfers when introducing sam9x60 qspi IP. Mem transfers will be added together with dirmap support. - reorganize the code and change ops functions pointers to avoid code duplication. - rename aq->clk to aq->pclk to indicate that it's a peripheral clock. - drop unused and NOP transfer macros. - add Suggested-by tags, reword some commits. v2: - cache MR value, - drop iomem wrappers, - make "pclk" clock-name mandatory even for sama5d2, - rework clock handling, - reorder setting of register values in set_cfg() calls, - collect R-b tags. Tudor Ambarus (13): spi: atmel-quadspi: cache MR value to avoid a write access spi: atmel-quadspi: order header files inclusion alphabetically spi: atmel-quadspi: drop wrappers for iomem accesses spi: atmel-quadspi: fix naming scheme spi: atmel-quadspi: remove unnecessary cast spi: atmel-quadspi: return appropriate error code spi: atmel-quadspi: switch to SPDX license identifiers spi: atmel-quadspi: drop unused and NOP transfer macros dt-bindings: spi: atmel-quadspi: update example to new clock binding dt-bindings: spi: atmel-quadspi: make "pclk" mandatory spi: atmel-quadspi: add support for named peripheral clock dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60 spi: atmel-quadspi: add support for sam9x60 qspi controller .../devicetree/bindings/spi/atmel-quadspi.txt | 12 +- drivers/spi/atmel-quadspi.c | 402 ++++++++++++++------- 2 files changed, 288 insertions(+), 126 deletions(-)