From patchwork Tue Apr 9 19:22:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Murray X-Patchwork-Id: 10892169 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4A860922 for ; Tue, 9 Apr 2019 19:22:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 30BE8288D0 for ; Tue, 9 Apr 2019 19:22:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2488C28924; Tue, 9 Apr 2019 19:22:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A8F39288D0 for ; Tue, 9 Apr 2019 19:22:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=5CEys/+L+oQ57tNzbM8kv9Je7ZEEObiX6HxpuzrKdBo=; b=QuOsaYalhVqSSV 5VzIP9ioHAD0DL4NtyCQYkqs5fRRBW2LDSBLZThcYbA03UiOAmRNxj+ZWKL7vi+pkwcr6QwW3g9oT KyPE1O6yd0Hw2Aq7vecU1vyqK30R2388/xmMkbo/6tKi8/TNNNEggJUatjqq1UFs+/KRv8XrL+VP0 iaxIFwFJamqN5HXJ+1awQGhvg1CepEKDBpBojGW53+TRnxX/xcEtEJkPYpgkDQOAOV64XD2lHJeul 97lxOy0BCheRw4dWERudMxiSvTZVlY6SGSyeRqUJNnzFugZ9y1sDOrdI9aHw8cTTVnqgNZS9LH8fn BElvB6NyPbYd36ToFY/A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hDwKD-0005Gj-Nq; Tue, 09 Apr 2019 19:22:29 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hDwKA-0005G3-Cs for linux-arm-kernel@lists.infradead.org; Tue, 09 Apr 2019 19:22:27 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 626DEA78; Tue, 9 Apr 2019 12:22:24 -0700 (PDT) Received: from e119886-lin.cambridge.arm.com (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 685633F59C; Tue, 9 Apr 2019 12:22:22 -0700 (PDT) From: Andrew Murray To: Christoffer Dall , Marc Zyngier , Catalin Marinas , Will Deacon , Mark Rutland Subject: [PATCH v13 0/8] arm64: Support perf event modifiers :G and :H Date: Tue, 9 Apr 2019 20:22:09 +0100 Message-Id: <20190409192217.23459-1-andrew.murray@arm.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190409_122226_444707_DAB9032C X-CRM114-Status: GOOD ( 15.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Thierry , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, Suzuki K Poulose Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This patchset provides support for perf event modifiers :G and :H which allows for filtering of PMU events between host and guests when used with KVM. As the underlying hardware cannot distinguish between guest and host context we must switch the performance counters upon entry/exit to the guest. For non-VHE the counters must be stopped and started upon entry/exit to the guest in __kvm_vcpu_run_nvhe. For VHE we keep the counters enabled but instead change the event type to include/exclude EL0 as appropriate. This allows us to perform this switch outside the critical section of world-switch code in vcpu_load. This has been tested with VHE and non-VHE kernels with a KVM guest. Changes from v12: - Rebased to v5.1-rc4 - Fixed breakage for arm32 - Improved clarity of documentation Changes from v11: - Rebased to v5.1-rc2 - Minor changes to commit messages, fixing typos, removing superfluous comments, code. - Change ^ to != in kvm_pmu_switch_needed Changes from v10: - Remove counter switch code from kvm_vcpu_run_vhe and replace with enable/disable EL0 event type in kvm_arch_vcpu_load instead - Reduce counter switch code in __kvm_vcpu_run_nvhe by moving some logic to kvm_set_pmu_events (kvm_pmu_switch_needed) - Simplify code by removing need for KVM_PMU_EVENTS_{HOST,GUEST} - Add kvm_host helper function to let PMU determine if event should start counting when it is enabled - Exclude EL2 on !VHE when exclude_host (to avoid counting host events as guest during entry/exit) - Moved PMU switching code to its own file - Rebased to v5.0 - Added documentation - Removed Reviewed-By's for changed patches and updated commit messages Changes from v9: - Rebased to v5.0-rc2 - Ensure get_host_ctxt considers host_ctxt offset Changes from v8: - Added additional comments - Fixed bisect build failure - Renamed cpu_ctxt variable to cpu_data Changes from v7: - Added additional patch to encapsulate kvm_cpu_context in kvm_host_data Changes from v6: - Move events_host/events_guest out of kvm_cpu_context Changes from v5: - Tweak logic in use of kvm_set_pmu_events Changes from v4: - Prevent unnecessary write_sysreg calls by improving __pmu_switch_to_xxx logic. Changes from v3: - Remove confusing _only suffix from bitfields in kvm_cpu_context - Remove unnecessary condition when clearing event bits in disable - Simplify API of KVM accessors - Prevent unnecessary setting of pmcnten when guest/host events are the same. Changes from v2: - Ensured that exclude_kernel works for guest - Removed unnecessary exclusion of EL2 with exclude_host on !VHE - Renamed kvm_clr_set_host_pmu_events to reflect args order - Added additional information to isb patch Changes from v1: - Removed unnecessary exclusion of EL1 with exclude_guest on VHE - Removed unnecessary isb from existing perf_event.c driver - Folded perf_event.c patches together - Added additional information to last patch commit message Andrew Murray (8): arm64: arm_pmu: remove unnecessary isb instruction arm64: KVM: encapsulate kvm_cpu_context in kvm_host_data arm64: KVM: add accessors to track guest/host only counters arm64: arm_pmu: Add !VHE support for exclude_host/exclude_guest attributes arm64: KVM: Enable !VHE support for :G/:H perf event modifiers arm64: KVM: Enable VHE support for :G/:H perf event modifiers arm64: KVM: avoid isb's by using direct pmxevtyper sysreg arm64: docs: document perf event attributes Documentation/arm64/perf.txt | 85 +++++++++++ arch/arm/include/asm/kvm_host.h | 13 +- arch/arm64/include/asm/kvm_asm.h | 3 +- arch/arm64/include/asm/kvm_host.h | 39 ++++- arch/arm64/kernel/asm-offsets.c | 1 + arch/arm64/kernel/perf_event.c | 50 +++++-- arch/arm64/kvm/Makefile | 2 +- arch/arm64/kvm/hyp/switch.c | 6 + arch/arm64/kvm/pmu.c | 232 ++++++++++++++++++++++++++++++ arch/arm64/kvm/sys_regs.c | 3 + virt/kvm/arm/arm.c | 16 ++- 11 files changed, 424 insertions(+), 26 deletions(-) create mode 100644 Documentation/arm64/perf.txt create mode 100644 arch/arm64/kvm/pmu.c