mbox series

[v2,0/2] arm64: Relax ICC_PMR_EL1 synchronisation when possible

Message ID 20190802125208.73162-1-maz@kernel.org (mailing list archive)
Headers show
Series arm64: Relax ICC_PMR_EL1 synchronisation when possible | expand

Message

Marc Zyngier Aug. 2, 2019, 12:52 p.m. UTC 
This is an update on [1] after Will's comments, turning the original
kernel patching into a static key. An additional patch now documents
the expectations of having ICC_CTLR_EL3.PMHE set to something
consistent across CPUs and over time.

[1] http://lists.infradead.org/pipermail/linux-arm-kernel/2019-July/669756.html

Marc Zyngier (2):
  arm64: Relax ICC_PMR_EL1 accesses when ICC_CTLR_EL1.PMHE is clear
  arm64: Document ICC_CTLR_EL3.PMHE setting requirements

 Documentation/arm64/booting.rst    |  3 +++
 arch/arm64/include/asm/barrier.h   | 12 ++++++++++++
 arch/arm64/include/asm/daifflags.h |  3 ++-
 arch/arm64/include/asm/irqflags.h  | 19 ++++++++++---------
 arch/arm64/include/asm/kvm_host.h  |  3 +--
 arch/arm64/kernel/entry.S          |  6 ++++--
 arch/arm64/kvm/hyp/switch.c        |  4 ++--
 drivers/irqchip/irq-gic-v3.c       | 17 +++++++++++++++++
 include/linux/irqchip/arm-gic-v3.h |  2 ++
 9 files changed, 53 insertions(+), 16 deletions(-)