| Message ID | 20190828113618.6672-1-geert+renesas@glider.be (mailing list archive) |
|---|---|
| Headers | show |
| Series | soc: renesas: rcar-gen3-sysc: Fix power request conflicts | expand |
Hi Geert-san, > From: Geert Uytterhoeven, Sent: Wednesday, August 28, 2019 8:36 PM > > Hi all, > > Recent R-Car Gen3 SoCs added an External Request Mask Register to the > System Controller (SYSC). This register allows to mask external power > requests for CPU or 3DG domains, to prevent conflicts between powering > off CPU cores or the 3D Graphics Engine, and changing the state of > another power domain through SYSC, which could lead to CPG state machine > lock-ups. > > This patch series starts making use of this register. Note that the > register is optional, and that its location and contents are > SoC-specific. > > This was inspired by a patch in the BSP by Dien Pham > <dien.pham.ry@renesas.com>. > > Note that the issue fixed cannot happen in the upstream kernel, as > upstream has no support for graphics acceleration yet. SoCs lacking the > External Request Mask Register may need a different mitigation in the > future. > > Changes compared to v1[1]: > - Improve description of cover letter and first patch. > > Changes compared to RFC[2]: > - Rebased. > > This has been boot-tested on R-Car H3 ES1.0, H3 ES2.0, M3-W ES1.0, M3-N, > V3M, and E3 (only the last 3 have this register!), and regression-tested > on R-Car Gen2. > > This has not been tested on R-Car H3 ES3.0, M3-W ES2.0, and V3H. I also boot-tested on R-Car H3 ES3.0 and M3-W ES3.0. And I reviewed all patches, so: Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Best regards, Yoshihiro Shimoda
On Wed, Aug 28, 2019 at 01:36:11PM +0200, Geert Uytterhoeven wrote: > Hi all, > > Recent R-Car Gen3 SoCs added an External Request Mask Register to the > System Controller (SYSC). This register allows to mask external power > requests for CPU or 3DG domains, to prevent conflicts between powering > off CPU cores or the 3D Graphics Engine, and changing the state of > another power domain through SYSC, which could lead to CPG state machine > lock-ups. > > This patch series starts making use of this register. Note that the > register is optional, and that its location and contents are > SoC-specific. > > This was inspired by a patch in the BSP by Dien Pham > <dien.pham.ry@renesas.com>. > > Note that the issue fixed cannot happen in the upstream kernel, as > upstream has no support for graphics acceleration yet. SoCs lacking the > External Request Mask Register may need a different mitigation in the > future. > > Changes compared to v1[1]: > - Improve description of cover letter and first patch. > > Changes compared to RFC[2]: > - Rebased. > > This has been boot-tested on R-Car H3 ES1.0, H3 ES2.0, M3-W ES1.0, M3-N, > V3M, and E3 (only the last 3 have this register!), and regression-tested > on R-Car Gen2. > > This has not been tested on R-Car H3 ES3.0, M3-W ES2.0, and V3H. > > For your convenience, this series is available in the > topic/rcar3-sysc-extmask-v2 branch of my renesas-drivers git repository at > git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git. > > Thanks for your comments! Looks good to me. Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
On Thu, Aug 29, 2019 at 6:14 AM Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> wrote: > > From: Geert Uytterhoeven, Sent: Wednesday, August 28, 2019 8:36 PM > > Recent R-Car Gen3 SoCs added an External Request Mask Register to the > > System Controller (SYSC). This register allows to mask external power > > requests for CPU or 3DG domains, to prevent conflicts between powering > > off CPU cores or the 3D Graphics Engine, and changing the state of > > another power domain through SYSC, which could lead to CPG state machine > > lock-ups. > > > > This patch series starts making use of this register. Note that the > > register is optional, and that its location and contents are > > SoC-specific. > > > > This was inspired by a patch in the BSP by Dien Pham > > <dien.pham.ry@renesas.com>. > > > > Note that the issue fixed cannot happen in the upstream kernel, as > > upstream has no support for graphics acceleration yet. SoCs lacking the > > External Request Mask Register may need a different mitigation in the > > future. > > > > Changes compared to v1[1]: > > - Improve description of cover letter and first patch. > > > > Changes compared to RFC[2]: > > - Rebased. > > > > This has been boot-tested on R-Car H3 ES1.0, H3 ES2.0, M3-W ES1.0, M3-N, > > V3M, and E3 (only the last 3 have this register!), and regression-tested > > on R-Car Gen2. > > > > This has not been tested on R-Car H3 ES3.0, M3-W ES2.0, and V3H. > > I also boot-tested on R-Car H3 ES3.0 and M3-W ES3.0. > And I reviewed all patches, so: > > Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Thanks, queued in renesas-devel for v5.5. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
Hi all, Recent R-Car Gen3 SoCs added an External Request Mask Register to the System Controller (SYSC). This register allows to mask external power requests for CPU or 3DG domains, to prevent conflicts between powering off CPU cores or the 3D Graphics Engine, and changing the state of another power domain through SYSC, which could lead to CPG state machine lock-ups. This patch series starts making use of this register. Note that the register is optional, and that its location and contents are SoC-specific. This was inspired by a patch in the BSP by Dien Pham <dien.pham.ry@renesas.com>. Note that the issue fixed cannot happen in the upstream kernel, as upstream has no support for graphics acceleration yet. SoCs lacking the External Request Mask Register may need a different mitigation in the future. Changes compared to v1[1]: - Improve description of cover letter and first patch. Changes compared to RFC[2]: - Rebased. This has been boot-tested on R-Car H3 ES1.0, H3 ES2.0, M3-W ES1.0, M3-N, V3M, and E3 (only the last 3 have this register!), and regression-tested on R-Car Gen2. This has not been tested on R-Car H3 ES3.0, M3-W ES2.0, and V3H. For your convenience, this series is available in the topic/rcar3-sysc-extmask-v2 branch of my renesas-drivers git repository at git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git. Thanks for your comments! [1] Not posted, but included in yesterday's renesas-drivers-2019-08-27-v5.3-rc6 [2] "[RFC PATCH 0/7] soc: renesas: rcar-gen3-sysc: Fix power request conflicts" (https://lore.kernel.org/linux-renesas-soc/20181205155028.14335-1-geert+renesas@glider.be/) Geert Uytterhoeven (7): soc: renesas: rcar-sysc: Prepare for fixing power request conflicts soc: renesas: r8a7795-sysc: Fix power request conflicts soc: renesas: r8a7796-sysc: Fix power request conflicts soc: renesas: r8a77965-sysc: Fix power request conflicts soc: renesas: r8a77970-sysc: Fix power request conflicts soc: renesas: r8a77980-sysc: Fix power request conflicts soc: renesas: r8a77990-sysc: Fix power request conflicts drivers/soc/renesas/r8a7795-sysc.c | 32 ++++++++++++++++++++++++----- drivers/soc/renesas/r8a7796-sysc.c | 22 +++++++++++++++++++- drivers/soc/renesas/r8a77965-sysc.c | 3 +++ drivers/soc/renesas/r8a77970-sysc.c | 3 +++ drivers/soc/renesas/r8a77980-sysc.c | 3 +++ drivers/soc/renesas/r8a77990-sysc.c | 3 +++ drivers/soc/renesas/rcar-sysc.c | 16 +++++++++++++++ drivers/soc/renesas/rcar-sysc.h | 7 +++++-- 8 files changed, 81 insertions(+), 8 deletions(-)