| Message ID | 20191106104918.26397-1-ardb@kernel.org (mailing list archive) |
|---|---|
| Headers | show |
| Series | ARM/decompressor: deal with disabled CP15 barrier instructions | expand |
On 2019-11-06 11:58, Ard Biesheuvel wrote: > [ Resending because --cc-cover didn't take ] > > While trying to test my v4.4 backport of the firmware/hypervisor > based spectre > v1/v2 mitigations for 32-bit ARM, I noticed that KVM/qemu failed to > boot my > kernel while it booted fine under TCG emulation. > > As it turns out, KVM/qemu may instantiate the VCPU with support for > CP15 > barrier instructions disabled, causing them to UNDEF and crash the > decompressor. > > I already fixed the same issue for UEFI boot, but since v4.4 does not > support > that, I only noticed now that this is an issue for bare metal as > well. > > Cc: Russell King <rmk+kernel@armlinux.org.uk> > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Marc Zyngier <maz@kernel.org> > > Ard Biesheuvel (2): > ARM/decompressor: avoid CP15 barrier instructions in v7 cache setup > code > Revert "ARM: 8857/1: efi: enable CP15 DMB instructions before > cleaning > the cache" > > arch/arm/boot/compressed/head.S | 51 ++++++++++---------- > 1 file changed, 26 insertions(+), 25 deletions(-) For the whole series: Acked-by: Marc Zyngier <maz@kernel.org> M.
[ Resending because --cc-cover didn't take ] While trying to test my v4.4 backport of the firmware/hypervisor based spectre v1/v2 mitigations for 32-bit ARM, I noticed that KVM/qemu failed to boot my kernel while it booted fine under TCG emulation. As it turns out, KVM/qemu may instantiate the VCPU with support for CP15 barrier instructions disabled, causing them to UNDEF and crash the decompressor. I already fixed the same issue for UEFI boot, but since v4.4 does not support that, I only noticed now that this is an issue for bare metal as well. Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Marc Zyngier <maz@kernel.org> Ard Biesheuvel (2): ARM/decompressor: avoid CP15 barrier instructions in v7 cache setup code Revert "ARM: 8857/1: efi: enable CP15 DMB instructions before cleaning the cache" arch/arm/boot/compressed/head.S | 51 ++++++++++---------- 1 file changed, 26 insertions(+), 25 deletions(-)